NEO-CMC



Late SNK custom chip used for protection, bankswitching and latching on CHAFIO CHA boards.

Descrambling/decryption infos can be found in [MAME:prot_cmc.c]

Versions
This chip is a TC190G series Toshiba ASIC developed between 1990 and 1994.

The datasheet apparently can't be found anymore for any of the known types: (probably others...)
 * TC190G06CF7008
 * TC190G06CF7042
 * TC190G06CF7050

SNK merged the following designs into this chip:
 * New scrambling system that interlaces M1 + (C* + S1) to decrypt all the graphics ROMs data in real time.
 * New scrambling system that interlaces M1 + (C* + S1) to decrypt all the graphics ROMs data in real time.
 * New scrambling system that interlaces M1 + (C* + S1) to decrypt all the graphics ROMs data in real time.
 * New scrambling system that interlaces M1 + (C* + S1) to decrypt all the graphics ROMs data in real time.

The first released NEO-MVS CHAFIO PCBs came out with the 042 version of NEO-CMC, on the following cartridges:
 * Zupapa!
 * The King of Fighters '99 - Millennium Battle
 * Ganryu
 * Garou - Mark of the Wolves
 * Strikers 1945 Plus
 * Prehistoric Isle 2
 * Metal Slug 3
 * Bang Bead
 * Nightmare in the Dark
 * Sengoku 3

On this version only the S1 and C ROMs are encrypted and M1 remains unencrypted. Almost one year later, SNK decided to add one more layer, this time also encrypting M1. This new NEO-CMC chip had the 050 reference and was found in the following cartridges:
 * Jockey Grand Prix
 * The King of Fighters 2000
 * The King of Fighters 2001
 * Metal Slug 4
 * Rage of the Dragons
 * The King of Fighters 2002
 * Matrimelee
 * Pochi and Nyaa
 * Metal Slug 5
 * SNK vs. Capcom - SVC Chaos
 * Samurai Shodown V
 * The King of Fighters 2003
 * Samurai Shodown V Special

Until today, nobody has released a cloned chip on the underground market.

Fix handling
See fix bankswitching.

Encryption
Todo.

=Pinout=

OpenOffice Draw file:

Signals: CXe_D[0..15]: C odd data bus CXo_D[0..15]: C even data bus CX_A[0..21]: C1~8 address bus Pin 32 connects power Power System Reset (PST600D) to reset the NEOCMC decryption in case of power failure. Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts Pins 89 and 92 are shorted. Pin 94 in MVS is NC and AES is connected again to 12M Pin 147 is used only in MVS and AES relase (2003.7.24) as M1_CE else release is NC

NOTE1: There is no difference in pinouts between NEO-CMC42 and NEO-CMC50, however the boards can present a differences between previous or latest board releases with respect to the pin 147. Also there is substantial setup difference between the AES and MVS boards, however the NEO-CMC is interchangeable between boards even between MVS to AES. Only the Graphic Information delivery is different but is present inside both NEO-CMC(40/50). See the releases reference at (CHAFIO) NOTE2: In case somebody wonders, it's impossible to downgrade or upgrade NEOCMCs between different versions (from 42 to 50 and vice-versa) without preparing the game for that. Also the algorithm isn't known.