NEO-ZMC

Memory Controller. Provides a hardwired 32KiB bank and switchable 16, 8, 4, and 2KiB banks arranged as a register file. To save pins, the Z80's upper address lines (A15~A18) are used for data input. The chip's write strobe is port address decoded inside the system.

=Pinout=

Are pins 10, 11, 12 higher address bits ?


 * SDA0, SDA1, SDA8~15: Z80 address bus
 * M1 A11~M1 A18: M1 ROM address lines
 * SDRD0: Decoded write signal from (latch on rising edge)

=Operation=

SDA8~15 is used for the bank number (data), SDA0 and SDA1 for selecting the bank zone.

Details


SDRD0 must be high before configuring banks.

To configure a bank to be accessed (e.g. bank 0 in the $8000~$BFFF range):
 * Set SDRD0 low (prepare for new bank configuration, outputs are tri-stated)
 * Set SDA0~15 = $8003 (select bank 0 and 16k range size) Why $8003 and not just $0003 ?
 * Set SDRD0 high (latch bank, ready to convert inputs to proper output signals)
 * Now, when the Z80 reads the $8000~BFFF range, NEO-ZMC will map this to the M1 ROM zone $00000~$03FFF;

To configure a bank to be accessed (e.g. bank 1 in the $8000~$BFFF range):
 * Set SDRD0 low (prepare for new bank configuration, outputs are tri-stated)
 * Set SDA0~15 = $8103 (select bank 1 and 16k range size) Why $8103 and not just $0103 ?
 * Set SDRD0 high (latch bank, ready to convert inputs to proper output signals)
 * Now, when the Z80 reads the $8000~BFFF range, NEO-ZMC will map this to the M1 ROM zone $04000~$07FFF;