Z80/YM2610 interface

The can access the  through two pair of ports. They're usually called Address A, Data A, and Address B, Data B. They're respectively Z80 ports 4, 5, 6 and 7.


 * Pair A (Z80 ports 4 and 5) concerns the SSG, ADPCM-B, and FM channels 1 and 2.
 * Pair B (Z80 ports 6 and 7) concerns the ADPCM-A, and FM channels 3 and 4.

See YM2610 registers for a complete definition of the registers.

The Z80's and SDA1 lines are directly connected to the YM2610's A0 and A1 inputs. uses SDA2 to decode the access to the YM2610.

=Timing requirements=

The YM2610 needs a delay between writes, or else they will be skipped. Some homebrew software produce sound in emulators but not on the real hardware because of this.

From Japanese datasheet:


 * Address write: 17 cycles (8MHz: 2.125us)
 * Data write: 83 cycles (8MHz: 10.375us)

Many original sound drivers use small routines with fixed delays to write to the YM2610:

di ld    a,d out   ($04),a ld    a,e out   ($05),a ei
 * DE -> YM2610 pair A
 * This also works with pair B (ports 6 & 7)
 * At least 21 T-states here ! (6 NOPs, 5.25us)
 * At least 73 T-states here ! (19 NOPs, 18.25us)

Polling the YM2610's busy flag is also a solution.