NEO-I0

MVS specific chip that does a bunch of unrelated things.


 * S ROM 16bit address latch for the SFIX ROM, same as S ROM portion of
 * SM1 /CS output when is reading from ROM and onboard ROMs are enabled
 * output for cartridge(s) PROG board
 * Video sync inversion (or not) to JAMMA connector
 * Coin counter and coin lockout outputs

=Pinout=


 * A1~A3,A7: address bus
 * P0~P15: P bus
 * Q01~Q18: SFIX ROM address lines
 * SM1CS(ORO0): SM1 ROM chip select, made from SYSTEM(ORI0) OR SDROM(ORI1)
 * SYNCOUT = SYNCIN XOR SYNCREV (SYNCREV always tied to ground ?)
 * Q21, Q22: METER1, METER2
 * Q23, Q24: LOCK1, LOCK2
 * DS0, DS1: Data select for 2-slot systems made from SLOT0, SLOT1, PORTADRS and ROMOE, goes to a
 * COUNTOUT: Address decode from