NEO-G0

Quadruple 245 with additional OR and AND gates. Predecessor of.

=Internal logic=

=AES pinout=

Palette RAM and memory card access. Palette RAM /WE and P1 ROM /OE generation.

=MV2B @ J4 pinout=

68k data bus access for both slots.

=MV2B @ J12 pinout=

ADPCM buses access for both slots.

=MV2B @ B7 pinout=

Palette RAM and memory card access. Palette RAM /WE and System ROM /OE generation.