68k/Z80 communication

68k to Z80 (request)
Writes to the Z80 are byte-wide and made through. Any byte can be sent, their meaning are only determined by the way the Z80 code handles them (except for 3 special cases, as seen below).

When a byte is sent, the corresponding value is buffered in the NEO-C1 chip (NEO-SUD in CD systems ), and an NMI is generated on the Z80 if enabled. It can then be read on the Z80's port $00.

(What chip is used on first gen chipset?)

Z80 to 68k (answer)
The Z80 port $0C is used to reply to the 68k. The value is also buffered in the same chips, but there's no interrupts generated. The value can be read by using the same register, $320000.

Many drivers acknowledge sound commands by echoing them back with bit 7 set to 1 when they are processed.

Special commands
Commands $01 and $03 are always expected to be implemented as they are used by the BIOSes for initialization purposes. During the MVS power up self-tests, if the Z80 doesn't reply to command $01 in time, the "Z80 ERROR" message is displayed and the system locks up.

Command $01
It is sent by the BIOS when the slot is switched. As the Z80 rom will be swapped, all sounds need to be stopped, NMI needs to be activated, $01 needs to be sent back to the 68k and the Z80 code has to sit in a loop in RAM. After receiving that $01 reply, the BIOS can then switch slot without crashing the Z80.

Command $02
It is used by cartridge systems to play the boot logo music. The pattern (melody) was certainly imposed by SNK, but developers often chose their own instruments parameters. Boot music. No reply is expected.

Command $03
It is used to ask for a soft reset of the Z80, which needs to be done under 100ms. No reply is expected.

These are sufficient handlers for both init commands:

Command01_Handler:		; with the command in A	di			; disable interrupts xor a        out  ($0C),a out ($00),a ; Init banks and stuff... ld  sp,#fffc ld  hl,stayinram push hl       retn                    ; retn to stayinram
 * "MAKOTO V3" style handler

stayinram: ld  hl,#fffd ld  (hl),#c3	        ; (FFFD)=C3, opcode for JP        ld   (#fffe),hl	        ; (FFFE)=FFFD (JP FFFD) ld  a,#01 out (#0c),a            ; Tell 68k that we're ready jp  #fffd              ; Sit in RAM loop

Command03_Handler:		; with the command in A	di			; disable interrupts ld  sp, $FFFF		; clear call stack ld  hl,0 push hl	retn			; RETN to 0