Signals

Most names come from the official schematics.

=Clocks=

=CPU (68k)=

=Graphics=

=Misc.=

=CPU (Z80)= =Sound=


 * PAL: Palette RAM address decode for 68k access
 * PCK1B: Low 55ns, high 610 (1.5MHz) Clock to latch C ROM address from P0~P23 (mapping) on rising edge.
 * PCK2B: Low 55ns, high 610 (1.5MHz) Clock to latch S ROM address from P0~P15 (mapping) on rising edge.
 * SDA0~SDA15 : Z80 address bus
 * SDD0~SDD7: Z80 data bus
 * SDRAD0~SDRAD7: ADPCM-A ROM multiplexed bus (data/address)
 * SDRA8,SDRA9,SDRA20~SDRA23: ADPCM-A ROM address bus
 * SDPAD0~SDPAD7: ADPCM-B ROM multiplexed bus (data/address)
 * SDPA8,SDPA9,SDPA10,SDPA11: ADPCM-B ROM address bus
 * SYSTEM: low when onboard ROMs selected
 * SYSTEMB: inverted SYSTEM