NeoGeo Development Wiki - User contributions [en]

Memory speed

2019-06-03T09:31:12Z

Bhamadicharef:

[[File:Aes_cxk5814.jpg|thumb|[[VRAM]] chip, note the "-35" marking. 35ns is the highest speed requirement in the NeoGeo.]]

Memory speed (or speed grade) is a value representing the maximum time it takes for a memory chip to output valid data after its address is changed.

It is essential for memory chips to be fast enough to avoid crashes or glitches. When replacing RAMs, replacing the [[system ROM]] or making cartmods, care must be taken to use chips with the appropriate speed grades.

Speed is usually indicated on the chip. It is actually a time value (speed = 1/t) specified in nanoseconds or tens of nanoseconds.

During the specified time, the data output isn't guaranteed to be valid. So if the chip is too slow, the system might catch wrong bits resulting in unstable operation.

Regarding the NeoGeo, faster than required (lower value) isn't a problem, slower than required (higher value) is bad.

A slower chip can work in some cases if you're lucky, but you should never expect stable operation in all conditions. For example, some 120ns chips might work in place of a 100ns one, but a slight variation in voltage or temperature could cause crashes or resets. Taking the risk isn't worth it.

=Requirements summary=

See the related section in the [[VRAM]], [[Palette RAM]], [[P ROM]], [[V ROM]], [[S ROM]], [[C ROM]], and [[M1 ROM]] pages.

{|class="wikitable"
!Memory kind
!Maximum value
!Mclks
!Proof
|-
|Z80 RAM
|rowspan="2"|<500ns (2 MHz)
|rowspan="2"|12? (500ns)
|rowspan="2"|Z80 read cycle
|-
|M1 ROM
|-
|Lower VRAM
|120ns (8.33 MHz)
|3 (125ns)
|Picture
|-
|Upper VRAM
|35ns (28.57 MHz)
|1 (41.7ns)
|Picture
|-
|Palette RAM
|120ns (8.33 MHz)
|3 (125ns)
|Picture
|-
|L0 ROM
|120ns ? (8.33 MHz)
|?
|
|-
|P ROM
|rowspan="4"|150ns (6.67 MHz)
|rowspan="4"|4 (167ns)
|rowspan="4"|SNK EPROM
|-
|System ROM
|-
|68k RAM
|-
|Backup RAM
|-
|V ROM
|200ns (5 MHz)
|6 (250ns)
|YM2610 read cycle
|-
|S ROM
|200ns ? (5 MHz)
|5? (208ns)
|
|-
|C ROM
|200ns ? (5 MHz)
|5? (208ns)
|
|-
|Memory card
|200ns ? (5 MHz)
|5? (208ns)
|
|}

=Standard speed grades=

* -250 (250ns)
* -200 '''or -20''' (200ns)
* -150 '''or -15''' (150ns)
* -120 '''or -12''' (120ns)
* -90 (90ns)
* -70 (70ns)
* -55 (55ns)
* -35 (35ns).

Note the possible confusion. If the value is less than 30 you probably have to add a 0, even if SRAM is now available in 25ns (not 250ns) speed grades.

Check the datasheets.

=DRAM=

DRAM (CD systems) is way more complex than SRAM, timings and sequences are primordial.

[[Category:Chips]]
[[Category:Base system]]
[[Category:Repairs]]

Memory speed

2019-06-03T09:30:40Z

Bhamadicharef:

[[File:Aes_cxk5814.jpg|thumb|[[VRAM]] chip, note the "-35" marking. 35ns is the highest speed requirement in the NeoGeo.]]

Memory speed (or speed grade) is a value representing the maximum time it takes for a memory chip to output valid data after its address is changed.

It is essential for memory chips to be fast enough to avoid crashes or glitches. When replacing RAMs, replacing the [[system ROM]] or making cartmods, care must be taken to use chips with the appropriate speed grades.

Speed is usually indicated on the chip. It is actually a time value (speed = 1/t) specified in nanoseconds or tens of nanoseconds.

During the specified time, the data output isn't guaranteed to be valid. So if the chip is too slow, the system might catch wrong bits resulting in unstable operation.

Regarding the NeoGeo, faster than required (lower value) isn't a problem, slower than required (higher value) is bad.

A slower chip can work in some cases if you're lucky, but you should never expect stable operation in all conditions. For example, some 120ns chips might work in place of a 100ns one, but a slight variation in voltage or temperature could cause crashes or resets. Taking the risk isn't worth it.

=Requirements summary=

See the related section in the [[VRAM]], [[Palette RAM]], [[P ROM]], [[V ROM]], [[S ROM]], [[C ROM]], and [[M1 ROM]] pages.

{|class="wikitable"
!Memory kind
!Maximum value
!Mclks
!Proof
|-
|Z80 RAM
|rowspan="2"|<500ns (2 MHz)
|rowspan="2"|12? (500ns)
|rowspan="2"|Z80 read cycle
|-
|M1 ROM
|-
|Lower VRAM
|120ns (8.33 MHz)
|3 (125ns)
|Picture
|-
|Upper VRAM
|35ns (28.57 MHz)
|1 (41.7ns)
|Picture
|-
|Palette RAM
|120ns (8.33 MHz)
|3 (125ns)
|Picture
|-
|L0 ROM
|120ns ? (8.33 MHz)
|?
|
|-
|P ROM
|rowspan="4"|150ns (6.67 MHz)
|rowspan="4"|4 (167ns)
|rowspan="4"|SNK EPROM
|-
|System ROM
|-
|68k RAM
|-
|Backup RAM
|-
|V ROM
|200ns (5 MHz)
|6 (250ns)
|YM2610 read cycle
|-
|S ROM
|200ns ? (5 MHz)
|5? (208ns)
|
|-
|C ROM
|200ns ? (5 MHz)
|5? (208ns)
|
|-
|Memory card
|200ns ? (XX MHz)
|5? (208ns)
|
|}

=Standard speed grades=

* -250 (250ns)
* -200 '''or -20''' (200ns)
* -150 '''or -15''' (150ns)
* -120 '''or -12''' (120ns)
* -90 (90ns)
* -70 (70ns)
* -55 (55ns)
* -35 (35ns).

Note the possible confusion. If the value is less than 30 you probably have to add a 0, even if SRAM is now available in 25ns (not 250ns) speed grades.

Check the datasheets.

=DRAM=

DRAM (CD systems) is way more complex than SRAM, timings and sequences are primordial.

[[Category:Chips]]
[[Category:Base system]]
[[Category:Repairs]]

Memory speed

2019-06-03T09:28:50Z

Bhamadicharef:

[[File:Aes_cxk5814.jpg|thumb|[[VRAM]] chip, note the "-35" marking. 35ns is the highest speed requirement in the NeoGeo.]]

Memory speed (or speed grade) is a value representing the maximum time it takes for a memory chip to output valid data after its address is changed.

It is essential for memory chips to be fast enough to avoid crashes or glitches. When replacing RAMs, replacing the [[system ROM]] or making cartmods, care must be taken to use chips with the appropriate speed grades.

Speed is usually indicated on the chip. It is actually a time value (speed = 1/t) specified in nanoseconds or tens of nanoseconds.

During the specified time, the data output isn't guaranteed to be valid. So if the chip is too slow, the system might catch wrong bits resulting in unstable operation.

Regarding the NeoGeo, faster than required (lower value) isn't a problem, slower than required (higher value) is bad.

A slower chip can work in some cases if you're lucky, but you should never expect stable operation in all conditions. For example, some 120ns chips might work in place of a 100ns one, but a slight variation in voltage or temperature could cause crashes or resets. Taking the risk isn't worth it.

=Requirements summary=

See the related section in the [[VRAM]], [[Palette RAM]], [[P ROM]], [[V ROM]], [[S ROM]], [[C ROM]], and [[M1 ROM]] pages.

{|class="wikitable"
!Memory kind
!Maximum value
!Mclks
!Proof
|-
|Z80 RAM
|rowspan="2"|<500ns (XX MHz)
|rowspan="2"|12? (500ns)
|rowspan="2"|Z80 read cycle
|-
|M1 ROM
|-
|Lower VRAM
|120ns (XX MHz)
|3 (125ns)
|Picture
|-
|Upper VRAM
|35ns (XX MHz)
|1 (41.7ns)
|Picture
|-
|Palette RAM
|120ns (XX MHz)
|3 (125ns)
|Picture
|-
|L0 ROM
|120ns ? (XX MHz)
|?
|
|-
|P ROM
|rowspan="4"|150ns (XX MHz)
|rowspan="4"|4 (167ns)
|rowspan="4"|SNK EPROM
|-
|System ROM
|-
|68k RAM
|-
|Backup RAM
|-
|V ROM
|200ns (XX MHz)
|6 (250ns)
|YM2610 read cycle
|-
|S ROM
|200ns ? (XX MHz)
|5? (208ns)
|
|-
|C ROM
|200ns ? (XX MHz)
|5? (208ns)
|
|-
|Memory card
|200ns ? (XX MHz)
|5? (208ns)
|
|}

=Standard speed grades=

* -250 (250ns)
* -200 '''or -20''' (200ns)
* -150 '''or -15''' (150ns)
* -120 '''or -12''' (120ns)
* -90 (90ns)
* -70 (70ns)
* -55 (55ns)
* -35 (35ns).

Note the possible confusion. If the value is less than 30 you probably have to add a 0, even if SRAM is now available in 25ns (not 250ns) speed grades.

Check the datasheets.

=DRAM=

DRAM (CD systems) is way more complex than SRAM, timings and sequences are primordial.

[[Category:Chips]]
[[Category:Base system]]
[[Category:Repairs]]

Palette RAM

2018-04-06T04:57:55Z

Bhamadicharef:

[[File:Aes_palram.jpg|thumb|right|CXK5864 8KiB RAM chips as palette RAM in a AES system]]
Palette RAM is 16KiB (2 banks of 256 palettes of 16, 16bit [[colors]]), it contains color data for each [[palettes|palette]].

It is accessible directly from the [[68k]] [[68k memory map|memory space]].

=Speed=

Should be 120ns or less (3mclk).

The CXK5864BSP-10L is a 8192-word x 8-bit high speed CMOS static RAM.

The CXK5864BSP comes in 3 packages:

- CXK5864BSP-70L for 70ns (access time)

- CXK5864BSP-10L for 100ns (access time)

- CXK5864BSP-12L for 120ns (access time)

[[Category:Video system]]
[[Category:Chips]]

Palette RAM

2018-04-06T04:57:13Z

Bhamadicharef:

SNK Patents

2018-03-27T09:15:15Z

Bhamadicharef:

{|class="wikitable"
! Patent ID || Title || Inventor(s) || Filing Date || Publication Date || Description
|-
| USA [https://www.google.com/patents/US5940068 #5940068]
| ''Display controlling apparatus and control method thereof''
| [[Yoshihiko Hasegawa]], [[Takashi Yamatani]]
| 1996/02/14
| 1999/08/17
| NeoGeo video hardware, VRAM layout, methods for creating sprite effects with the scaling functions (used in [[World Heroes 2]]).
|-
| USA [https://www.google.com/patents/US5643083 #5643083]
| ''Control device for game operation state data''
| [[Yoshihiko Hasegawa]]
| 1995/04/10
| 1997/07/01
| MVS [[System ROM]] functions (game-specific parameters, play time stats and time keeping, etc.)
|-
| USA [https://www.google.com/patents/USD373149 #D373149]
| ''Pad controller attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/08/27
| Design patent for Neo-Geo CD controller.
|-
| USA [https://www.google.com/patents/USD375765 #D375765]
| ''Joystick attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/11/19
| Design patent for Neo-Geo CD joystick.
|-
| Europe [https://www.google.com/patents/EP0429160A2 #0429160A2 ]
| ''Memory cartridge for use with TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/03/06
| 1991/05/29
| (simplified) AES cartridge overview
|-
| USA [https://www.google.com/patents/US5114157 #5114157]
| ''Game machine having plural display panel units and plural memory cartridges''
| [[Toshihiko Kita]]
| 1990/06/11
| 1992/05/19
| Explains the MVS (as it relates to having multiple games in one machine, note the 8 slots); uses a MV25TA-0 as the example cabinet.
|-
| Europe [https://www.google.com/patents/EP0431723A2 #0431723 A2]
| ''TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/04/20
| 1991/06/12
| AES/Home system overview
|-
| Europe [https://www.google.com/patents/EP0997172A1 #0997172 A1]
| ''Game system, game device, and game method''
| [[Yoshinori Matsumoto]], [[Takashi Nishiyama]]
| 1998/04/06
| 2000/05/03
| Possible portable device linkup with MVS/AES/CD systems.
|-
| Europe [https://www.google.com/patents/EP0883019A1 #0883019 A1] USA [[https://www.google.com/patents/US6226455 #6226455]]
| ''Shooting apparatus''
| [[Kenta Fujimoto]], [[Kazukuni Hiraoka]], [[Hamao Horiguchi]], [[Kouichi Ishimoto]], [[Hiroaki Kimura]], [[Shigekazu Matsumoto]]
| 1997/02/18
| 1998/12/09
| [[Neo Print]] cab description.
|-
| USA [[https://patents.google.com/patent/US6055000A #US6055000A]]
| ''Storage memory for images''
| [[Satoshi Okada]]
| 1998/05/28 (priority)
| 2000/04/25
| An image storage memory apparatus comprises a first memory for separating an image of M by N pixels into a plurality of blocks, generating H pieces of sets making coded notation of the mutually different m by n kinds of colors into each set component ...
|}

Using a search SNK Corporation, SNK has 26 patents and patent applications registered. All are applied in Japan and few granted with US patent number.

TODO: It would be interested to list them all with a time axis with 4 dates of Priority, Filling, Publication and Grant.

[[Category:Base system]]

Yoshihiko Hasegawa

2018-03-26T04:53:00Z

Bhamadicharef:

Inventor working for SNK Corp. [[https://en.wikipedia.org/wiki/SNK # SNK Corp.]]
Link to Google patent [[https://patents.google.com/?inventor=Yoshihiko+Hasegawa&assignee=SNK]]

Yoshihiko Hasegawa

2018-03-26T04:51:13Z

Bhamadicharef:

== Yoshihiko Hasegawa ==

Inventor working for SNK Corp. [[https://en.wikipedia.org/wiki/SNK # SNK Corp.]]
[[https://patents.google.com/?inventor=Yoshihiko+Hasegawa&assignee=SNK]]

[[Category:SNK_Patents]]

Takashi Yamatani

2018-03-26T04:48:44Z

Bhamadicharef: Takashi Yamatani inventor

== Takashi Yamatani ==

SNK staff inventor
US5940068A patent on Display controlling apparatus and control method thereof"

[[https://patents.google.com/?inventor=Takashi+Yamatani&assignee=SNK #US5940068A]]

Yoshihiko Hasegawa

2018-03-26T04:41:52Z

Bhamadicharef: Inventor Yoshihiko Hasegawa, SNK staff

== Yoshihiko Hasegawa

Inventor working for SNK Corp. [[https://en.wikipedia.org/wiki/SNK # SNK Corp.]]
[[https://patents.google.com/?inventor=Yoshihiko+Hasegawa&assignee=SNK]]

SNK Patents

2018-03-26T04:37:43Z

Bhamadicharef:

SNK Patents

2018-03-26T04:37:15Z

Bhamadicharef:

{|class="wikitable"
! Patent ID || Title || Inventor(s) || Filing Date || Publication Date || Description
|-
| USA [https://www.google.com/patents/US5940068 #5940068]
| ''Display controlling apparatus and control method thereof''
| [[Yoshihiko Hasegawa]], [[Takashi Yamatani]]
| 1996/02/14
| 1999/08/17
| NeoGeo video hardware, VRAM layout, methods for creating sprite effects with the scaling functions (used in [[World Heroes 2]]).
|-
| USA [https://www.google.com/patents/US5643083 #5643083]
| ''Control device for game operation state data''
| [[Yoshihiko Hasegawa]]
| 1995/04/10
| 1997/07/01
| MVS [[System ROM]] functions (game-specific parameters, play time stats and time keeping, etc.)
|-
| USA [https://www.google.com/patents/USD373149 #D373149]
| ''Pad controller attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/08/27
| Design patent for Neo-Geo CD controller.
|-
| USA [https://www.google.com/patents/USD375765 #D375765]
| ''Joystick attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/11/19
| Design patent for Neo-Geo CD joystick.
|-
| Europe [https://www.google.com/patents/EP0429160A2 #0429160A2 ]
| ''Memory cartridge for use with TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/03/06
| 1991/05/29
| (simplified) AES cartridge overview
|-
| USA [https://www.google.com/patents/US5114157 #5114157]
| ''Game machine having plural display panel units and plural memory cartridges''
| [[Toshihiko Kita]]
| 1990/06/11
| 1992/05/19
| Explains the MVS (as it relates to having multiple games in one machine, note the 8 slots); uses a MV25TA-0 as the example cabinet.
|-
| Europe [https://www.google.com/patents/EP0431723A2 #0431723 A2]
| ''TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/04/20
| 1991/06/12
| AES/Home system overview
|-
| Europe [https://www.google.com/patents/EP0997172A1 #0997172 A1]
| ''Game system, game device, and game method''
| [[Yoshinori Matsumoto]], [[Takashi Nishiyama]]
| 1998/04/06
| 2000/05/03
| Possible portable device linkup with MVS/AES/CD systems.
|-
| Europe [https://www.google.com/patents/EP0883019A1 #0883019 A1] USA [[https://www.google.com/patents/US6226455 #6226455]]
| ''Shooting apparatus''
| [[Kenta Fujimoto]], [[Kazukuni Hiraoka]], [[Hamao Horiguchi]], [[Kouichi Ishimoto]], [[Hiroaki Kimura]], [[Shigekazu Matsumoto]]
| 1997/02/18
| 1998/12/09
| [[Neo Print]] cab description.
|-
| USA [[https://patents.google.com/patent/US6055000A #US6055000A]]
| ''Storage memory for images''
| [[Satoshi Okada]]
| 1998/05/28 (priority)
| 2000/04/25
| An image storage memory apparatus comprises a first memory for separating an image
of M by N pixels into a plurality of blocks, generating H pieces of sets making coded
notation of the mutually different m by n kinds of colors into each set component ...
|}

[[Category:Base system]]

SNK Patents

2018-03-26T04:36:51Z

Bhamadicharef:

{|class="wikitable"
! Patent ID || Title || Inventor(s) || Filing Date || Publication Date || Description
|-
| USA [https://www.google.com/patents/US5940068 #5940068]
| ''Display controlling apparatus and control method thereof''
| [[Yoshihiko Hasegawa]], [[Takashi Yamatani]]
| 1996/02/14
| 1999/08/17
| NeoGeo video hardware, VRAM layout, methods for creating sprite effects with the scaling functions (used in [[World Heroes 2]]).
|-
| USA [https://www.google.com/patents/US5643083 #5643083]
| ''Control device for game operation state data''
| [[Yoshihiko Hasegawa]]
| 1995/04/10
| 1997/07/01
| MVS [[System ROM]] functions (game-specific parameters, play time stats and time keeping, etc.)
|-
| USA [https://www.google.com/patents/USD373149 #D373149]
| ''Pad controller attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/08/27
| Design patent for Neo-Geo CD controller.
|-
| USA [https://www.google.com/patents/USD375765 #D375765]
| ''Joystick attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/11/19
| Design patent for Neo-Geo CD joystick.
|-
| Europe [https://www.google.com/patents/EP0429160A2 #0429160A2 ]
| ''Memory cartridge for use with TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/03/06
| 1991/05/29
| (simplified) AES cartridge overview
|-
| USA [https://www.google.com/patents/US5114157 #5114157]
| ''Game machine having plural display panel units and plural memory cartridges''
| [[Toshihiko Kita]]
| 1990/06/11
| 1992/05/19
| Explains the MVS (as it relates to having multiple games in one machine, note the 8 slots); uses a MV25TA-0 as the example cabinet.
|-
| Europe [https://www.google.com/patents/EP0431723A2 #0431723 A2]
| ''TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/04/20
| 1991/06/12
| AES/Home system overview
|-
| Europe [https://www.google.com/patents/EP0997172A1 #0997172 A1]
| ''Game system, game device, and game method''
| [[Yoshinori Matsumoto]], [[Takashi Nishiyama]]
| 1998/04/06
| 2000/05/03
| Possible portable device linkup with MVS/AES/CD systems.
|-
| Europe [https://www.google.com/patents/EP0883019A1 #0883019 A1] USA [[https://www.google.com/patents/US6226455 #6226455]]
| ''Shooting apparatus''
| [[Kenta Fujimoto]], [[Kazukuni Hiraoka]], [[Hamao Horiguchi]], [[Kouichi Ishimoto]], [[Hiroaki Kimura]], [[Shigekazu Matsumoto]]
| 1997/02/18
| 1998/12/09
| [[Neo Print]] cab description.
|-
| USA [[https://patents.google.com/patent/US6055000A #US6055000A]]
| ''Storage memory for images''
| [[Satoshi Okada]]
| 1998/05/28 (priority)
| 2000/04/25
| An image storage memory apparatus comprises a first memory for separating an image
| of M by N pixels into a plurality of blocks, generating H pieces of sets making coded
| notation of the mutually different m by n kinds of colors into each set component ...
|}

[[Category:Base system]]

SNK Patents

2018-03-26T04:36:26Z

Bhamadicharef:

{|class="wikitable"
! Patent ID || Title || Inventor(s) || Filing Date || Publication Date || Description
|-
| USA [https://www.google.com/patents/US5940068 #5940068]
| ''Display controlling apparatus and control method thereof''
| [[Yoshihiko Hasegawa]], [[Takashi Yamatani]]
| 1996/02/14
| 1999/08/17
| NeoGeo video hardware, VRAM layout, methods for creating sprite effects with the scaling functions (used in [[World Heroes 2]]).
|-
| USA [https://www.google.com/patents/US5643083 #5643083]
| ''Control device for game operation state data''
| [[Yoshihiko Hasegawa]]
| 1995/04/10
| 1997/07/01
| MVS [[System ROM]] functions (game-specific parameters, play time stats and time keeping, etc.)
|-
| USA [https://www.google.com/patents/USD373149 #D373149]
| ''Pad controller attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/08/27
| Design patent for Neo-Geo CD controller.
|-
| USA [https://www.google.com/patents/USD375765 #D375765]
| ''Joystick attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/11/19
| Design patent for Neo-Geo CD joystick.
|-
| Europe [https://www.google.com/patents/EP0429160A2 #0429160A2 ]
| ''Memory cartridge for use with TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/03/06
| 1991/05/29
| (simplified) AES cartridge overview
|-
| USA [https://www.google.com/patents/US5114157 #5114157]
| ''Game machine having plural display panel units and plural memory cartridges''
| [[Toshihiko Kita]]
| 1990/06/11
| 1992/05/19
| Explains the MVS (as it relates to having multiple games in one machine, note the 8 slots); uses a MV25TA-0 as the example cabinet.
|-
| Europe [https://www.google.com/patents/EP0431723A2 #0431723 A2]
| ''TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/04/20
| 1991/06/12
| AES/Home system overview
|-
| Europe [https://www.google.com/patents/EP0997172A1 #0997172 A1]
| ''Game system, game device, and game method''
| [[Yoshinori Matsumoto]], [[Takashi Nishiyama]]
| 1998/04/06
| 2000/05/03
| Possible portable device linkup with MVS/AES/CD systems.
|-
| Europe [https://www.google.com/patents/EP0883019A1 #0883019 A1] USA [[https://www.google.com/patents/US6226455 #6226455]]
| ''Shooting apparatus''
| [[Kenta Fujimoto]], [[Kazukuni Hiraoka]], [[Hamao Horiguchi]], [[Kouichi Ishimoto]], [[Hiroaki Kimura]], [[Shigekazu Matsumoto]]
| 1997/02/18
| 1998/12/09
| [[Neo Print]] cab description.
|-
| USA [[https://patents.google.com/patent/US6055000A #US6055000A]]
| ''Storage memory for images''
| [[Satoshi Okada]]
| 1998/05/28 (priority)
| 2000/04/25
| An image storage memory apparatus comprises a first memory for separating an image 
| of M by N pixels into a plurality of blocks, generating H pieces of sets making coded 
| notation of the mutually different m by n kinds of colors into each set component ...
|}

[[Category:Base system]]

SNK Patents

2018-03-26T04:34:25Z

Bhamadicharef:

{|class="wikitable"
! Patent ID || Title || Inventor(s) || Filing Date || Publication Date || Description
|-
| USA [https://www.google.com/patents/US5940068 #5940068]
| ''Display controlling apparatus and control method thereof''
| [[Yoshihiko Hasegawa]], [[Takashi Yamatani]]
| 1996/02/14
| 1999/08/17
| NeoGeo video hardware, VRAM layout, methods for creating sprite effects with the scaling functions (used in [[World Heroes 2]]).
|-
| USA [https://www.google.com/patents/US5643083 #5643083]
| ''Control device for game operation state data''
| [[Yoshihiko Hasegawa]]
| 1995/04/10
| 1997/07/01
| MVS [[System ROM]] functions (game-specific parameters, play time stats and time keeping, etc.)
|-
| USA [https://www.google.com/patents/USD373149 #D373149]
| ''Pad controller attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/08/27
| Design patent for Neo-Geo CD controller.
|-
| USA [https://www.google.com/patents/USD375765 #D375765]
| ''Joystick attachment for a CD ROM video game player''
| [[Eikichi Kawasaki]]
| 1994/12/08
| 1996/11/19
| Design patent for Neo-Geo CD joystick.
|-
| Europe [https://www.google.com/patents/EP0429160A2 #0429160A2 ]
| ''Memory cartridge for use with TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/03/06
| 1991/05/29
| (simplified) AES cartridge overview
|-
| USA [https://www.google.com/patents/US5114157 #5114157]
| ''Game machine having plural display panel units and plural memory cartridges''
| [[Toshihiko Kita]]
| 1990/06/11
| 1992/05/19
| Explains the MVS (as it relates to having multiple games in one machine, note the 8 slots); uses a MV25TA-0 as the example cabinet.
|-
| Europe [https://www.google.com/patents/EP0431723A2 #0431723 A2]
| ''TV game machine''
| [[Yoshihiko Hasegawa]]
| 1990/04/20
| 1991/06/12
| AES/Home system overview
|-
| Europe [https://www.google.com/patents/EP0997172A1 #0997172 A1]
| ''Game system, game device, and game method''
| [[Yoshinori Matsumoto]], [[Takashi Nishiyama]]
| 1998/04/06
| 2000/05/03
| Possible portable device linkup with MVS/AES/CD systems.
|-
| Europe [https://www.google.com/patents/EP0883019A1 #0883019 A1] USA [[https://www.google.com/patents/US6226455 #6226455]]
| ''Shooting apparatus''
| [[Kenta Fujimoto]], [[Kazukuni Hiraoka]], [[Hamao Horiguchi]], [[Kouichi Ishimoto]], [[Hiroaki Kimura]], [[Shigekazu Matsumoto]]
| 1997/02/18
| 1998/12/09
| [[Neo Print]] cab description.
|-
| USA [[https://patents.google.com/patent/US6055000A]]
| ''Storage memory for images''
| [[Satoshi Okada]]
| 1998/05/28 (priority)
| 2000/04/25
| [[Neo Print]] cab description.
|}

[[Category:Base system]]

OBJ file

2018-03-26T04:31:32Z

Bhamadicharef:

OBJ files contain the [[sprites]] graphics (equivalent to the [[C ROM]]s on [[:Category:cartridge systems|cartridge systems]]). Data is compressed however using a simple RLE compression removing runs with a value of 0x00000000. Once decompressed the format is described here: [[sprite graphics format]].

== RLE compression.

* First long word value is the compressed data length (/4-1).
* The system works by checking single long words at a time.
* When a zero value is found it is stored and the next value is checked. A fill of zero is created to match the value read unless it is zero.

Example.

compressed:

0x00000007, 0x11111111, 0x00000000, 0x00000003, 0x22222222, 0x00000000, 0x00000000, 0x33333333, 0x44444444

decompressed:

0x11111111, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22222222, 0x00000000, 0x33333333, 0x44444444

This system will not compress data very well unless there are large areas of zero data within the decompressed sprite data. This is due to a single zero value being inflated by 100% to let the decompressor know it is not a run. To my current knowledge only Art of Fighting uses the OBJ format.

For reference below is a 68000 code snippet from bios TOP-SP1 that handles decompresses.

<syntaxhighlight>
C0BC5A 203C 00E0 0000 MOVE.L #0xE00000,D0
C0BC60 D0AD 7EF4 ADD.L (0x7EF4,A5),D0
C0BC64 2240 MOVEA.L D0,A1 <---- Where to decompress data
C0BC66 206D 7EF8 MOVEA.L (0x7EF8,A5),A0
C0BC6A 7000 MOVEQ #0x0,D0
C0BC6C 2E18 MOVE.L (A0)+,D7 <---- Get Length
C0BC6E 6738 BEQ.S *+0x3A [0xC0BCA8]
C0BC70 22D8 MOVE.L (A0)+,(A1)+ <---- Move single long word
C0BC72 6712 BEQ.S *+0x14 [0xC0BC86] <---- Branch if zero.
C0BC74 51CF FFFA DBF D7,*-0x4 [0xC0BC70] <---- check data end
C0BC78 2009 MOVE.L A1,D0
C0BC7A 0480 00E0 0000 SUBI.L #0xE00000,D0
C0BC80 2B40 7EF4 MOVE.L D0,(0x7EF4,A5)
C0BC84 4E75 RTS

C0BC86 2C18 MOVE.L (A0)+,D6 <---- Get next value
C0BC88 51CE 0014 DBF D6,*+0x12 [0xC0BC9E] <---- Decompress if non zero
C0BC8C 51CF FFE2 DBF D7,*-0x1C [0xC0BC70] <---- Check data end
C0BC90 2009 MOVE.L A1,D0
C0BC92 0480 00E0 0000 SUBI.L #0xE00000,D0
C0BC98 2B40 7EF4 MOVE.L D0,(0x7EF4,A5)
C0BC9C 4E75 RTS

C0BC9E 22C0 MOVE.L D0,(A1)+ <---- Recreate zero run
C0BCA0 51CE FFFC DBF D6,*-0x2 [0xC0BC9E] <---- and Loop until complete
C0BCA4 51CF FFCA DBF D7,*-0x34 [0xC0BC70] <---- Check data end

C0BCA8 2009 MOVE.L A1,D0
C0BCAA 0480 00E0 0000 SUBI.L #0xE00000,D0
C0BCB0 2B40 7EF4 MOVE.L D0,(0x7EF4,A5)
C0BCB4 4E75 RTS
</syntaxhighlight>

== Patent on data Compression

SNK has a later patent on "Storage memory for images"
Inventor Satoshi Okada
Original Assignee SNK Corp
Priority date: 1998-05-28
Granted: 2000-04-25
[[https://patents.google.com/patent/US6055000A/]]

[[Category:CD systems]]

CXA1145

2018-03-26T04:24:39Z

Bhamadicharef: CXA1145 Video Encoder chip

[[File:aes_cxa1145.jpg|right|thumb]]

Video encoder chip found in AES systems. Outputs RGBS and composite video signals from the output of the [[video DAC]].
Is paired with a color burst quartz oscillator.

==Datasheet==

Official datasheet: [[http://www.datasheetcatalog.org/datasheets/320/199042_DS.pdf]]

Datasheet PDFs (from [[https://console5.com]] )

Sony CXA1145P/M RGB Encoder
[[https://console5.com/techwiki/images/f/fb/CXA1145PM.pdf]]

Sony CXA1145P/M RGB Encoder (Japanese)
[[https://console5.com/techwiki/images/3/3d/CXA1145.pdf]]

Itri Erso ES71145 RGB Encoder (CXA1145 substitute, English)
[[https://console5.com/techwiki/images/2/20/ES71145.pdf]]

[[Category:Chips]]
[[Category:Video system]]

Palette RAM

2018-03-23T06:47:50Z

Bhamadicharef: /* Speed */

[[File:Aes_palram.jpg|thumb|right|CXK5864 8KiB RAM chips as palette RAM in a AES system]]
Palette RAM is 16KiB (2 banks of 256 palettes of 16, 16bit [[colors]]), it contains color data for each [[palettes|palette]].

It is accessible directly from the [[68k]] [[68k memory map|memory space]].

=Speed=

Should be 120ns or less (3mclk).

The CXK5864BSP-10L is a 8192-word x 8-bit high speed CMOS static RAM.

The CXK5864BSP comes in 3 packages:
- CXK5864BSP-70L for 70ns (access time)
- CXK5864BSP-10L for 100ns (access time)
- CXK5864BSP-12L for 120ns (access time)

[[Category:Video system]]
[[Category:RAM]]
[[Category:Chips]]