NeoGeo Development Wiki - User contributions [en]

Talk:NEO-I0

2026-05-13T06:45:20Z

Furrtek:

[[User:Ragefan|Ragefan]] on which board did you find pin 32 tied to GND ? I have RW on my MV1FS, as shown on schematics (https://wiki.neogeodev.org/index.php/File:Mv1fs-page2.jpg). --[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 00:08, 13 May 2026 (CEST)

Dear Furrtek, this is a MV1AX. That's very interesting 🤔

Maybe because NEO-MGA handles the coin counter outputs and so RW isn't needed on NEO-I0 ? --[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 08:45, 13 May 2026 (CEST)

Memory speed

2026-05-12T23:22:59Z

Furrtek: /* Requirements summary */

[[File:Aes_cxk5814.jpg|thumb|[[VRAM]] chip, note the "-35" marking. 35ns is the highest speed requirement in the NeoGeo.]]

Memory speed (or speed grade) is a value representing the maximum time it takes for a memory chip to output valid data after its address is changed.

It is essential for memory chips to be fast enough to avoid crashes or glitches. When replacing RAMs, replacing the [[system ROM]] or making cartmods, care must be taken to use chips with the appropriate speed grades.

Speed is usually indicated on the chip. It is actually a time value (speed = 1/t) specified in nanoseconds or tens of nanoseconds.

During the specified time, the data output isn't guaranteed to be valid. So if the chip is too slow, the system might catch wrong bits resulting in unstable operation.

Regarding the NeoGeo, faster than required (lower value) isn't a problem, slower than required (higher value) is bad.

A slower chip can work in some cases if you're lucky, but you should never expect stable operation in all conditions. For example, some 120ns chips might work in place of a 100ns one, but a slight variation in voltage or temperature could cause crashes or resets. Taking the risk isn't worth it.

=Requirements summary=

See the related section in the [[VRAM]], [[Palette RAM]], [[P ROM]], [[V ROM]], [[S ROM]], [[C ROM]], and [[M1 ROM]] pages.

{|class="wikitable"
!Memory kind
!Maximum value
!Mclks
!Proof
|-
|Z80 RAM
|rowspan="2"|<500ns (2 MHz)
|rowspan="2"|12? (500ns)
|rowspan="2"|Z80 read cycle
|-
|M1 ROM
|-
|Lower VRAM
|120ns (8.33 MHz)
|3 (125ns)
|Picture
|-
|Upper VRAM
|35ns (28.57 MHz)
|1 (41.7ns)
|Picture
|-
|Palette RAM
|120ns (8.33 MHz)
|3 (125ns)
|Picture
|-
|L0 ROM
|120ns ? (8.33 MHz)
|?
|
|-
|P ROM
|rowspan="4"|250ns
|rowspan="4"|6 (3 68k clocks) ?
|-
|System ROM
|-
|68k RAM
|-
|Backup RAM
|-
|V ROM
|200ns (5 MHz)
|6 (250ns)
|YM2610 read cycle
|-
|S ROM
|200ns ? (5 MHz)
|5? (208ns)
|
|-
|C ROM
|200ns ? (5 MHz)
|5? (208ns)
|
|-
|Memory card
|417ns ?
|10 (3 68k clocks + 2 waits) ?
|
|}

=Standard speed grades=

* -250 (250ns)
* -200 '''or -20''' (200ns)
* -150 '''or -15''' (150ns)
* -120 '''or -12''' (120ns)
* -90 (90ns)
* -70 (70ns)
* -55 (55ns)
* -35 (35ns).

Note the possible confusion. If the value is less than 30 you probably have to add a 0, even if SRAM is now available in 25ns (not 250ns) speed grades.

Check the datasheets.

=DRAM=

DRAM (CD systems) is way more complex than SRAM, timings and sequences are primordial.

[[Category:Chips]]
[[Category:Base system]]
[[Category:Repairs]]

Talk:NEO-I0

2026-05-12T22:08:14Z

Furrtek: Created page with "User:Ragefan| on which board did you find pin 32 tied to GND ? I have RW on my MV1FS, as shown on schematics (https://wiki.neogeodev.org/index.php/File:Mv1fs-page2.jpg). --~~~~"

Software DIPs

2026-05-10T19:13:24Z

Furrtek: /* Special settings list */

[[File:Softdips.png|thumb|right|A Soft DIPs setup screen.]]

Software DIPs are a list of a maximum of 14 game-specific settings. They can be modified from the MVS [[System ROM]] menu, or with system ROM hacks for other systems.

The settings names and their possible values are stored in the game's [[68k program header]] in a specific format, read by the system ROM to form a menu.

On the [[MVS]], the settings are saved for each game in the [[backup RAM]].

The settings are copied from backup RAM to [[68k user RAM|user RAM]] to '''BIOS_GAME_DIP''' ($10FD84) just before the game is started up. If no settings are found, they're initialized to the default values.

(Does the system ROM check values pulled from the backup RAM against the bounds given by the game ? Can a corrupt backup RAM save make games crash with
out of bounds settings ?)

Software DIPs settings aren't available on the AES, the system ROM always loads the game's default values.

== Config data description ==

Most of the following information by [[User:ElBarto|ElBarto]]:

{| class="regdef" style="text-align:center;"
| '''0x00'''
| 16 bytes
| Game name, no termination char required.
|-
| '''0x10'''
| 6 bytes
| Special settings list, 4 entries. See description below.
|-
| '''0x16'''
| 10 bytes
| Simple settings list, up to 10 entries. See description below.
|-
| '''0x20'''
| x*12 bytes
| String table. Strings are 12 bytes long and padded with 0x20 (space). Max number ?
|}

===Special settings list===

The special settings list holds 4 entries: the first 2 are for time settings, and the last 2 are for count settings.

A time setting occupies one word, which defines the default value:
* The upper byte is the minutes (up to 29, in BCD).
* The lower byte is the seconds (in BCD).

An unused time setting must be set to 0xFFFF.

A count setting occupies one byte, which defines the default value (not in BCD).
The first count setting can go from 1 to 99.
The second count setting is a "number of times", it can go from 0 (displayed as "WITHOUT") to 100 (displayed as "INFINITE").

An unused count setting must be set to 0xFF.

All special settings use a single string from the strings table, for the setting's name.

===Simple settings list===

Each options occupies one byte.

The upper 4 bits define the default value (starts from 0) and the lower 4 bits the number of choices.

A few games have a simple setting entry in entry #7 with a number of choices set to zero, to show a "▼NEXT PAGE" string on the bottom of the MVS menu. This is not done automatically by the system ROM.

==Examples==

<pre>
dc.b "TEST ROM " ; Game name
dc.w $FFFF ; Special settings list (none used)
dc.w $FFFF
dc.b $FF,$FF
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
; String table:
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

{|
|[[File:Config_1.png]]
|[[File:Config_2.png]]
|}

<pre>
dc.b "TEST ROM " ; Game name
dc.w $4220 ; Special setting 1: 42 minutes 20 seconds
dc.w $2042 ; Special setting 2: 20 minutes 42 seconds
dc.b $42 ; Special setting 3: 66
dc.b $64 ; Special setting 4: 100 ("INFINITE")
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b "TIMER 1 " ; Special setting 1's description
dc.b "TIMER 2 " ; Special setting 2's description
dc.b "COUNTER " ; Special setting 3's description
dc.b "COUNTER SPE " ; Special setting 4's description
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

[[File:Config_3.png]]

[[Category:Base system]]

Software DIPs

2026-05-10T16:37:36Z

Furrtek: /* Simple settings list */

[[File:Softdips.png|thumb|right|A Soft DIPs setup screen.]]

Software DIPs are a list of a maximum of 14 game-specific settings. They can be modified from the MVS [[System ROM]] menu, or with system ROM hacks for other systems.

The settings names and their possible values are stored in the game's [[68k program header]] in a specific format, read by the system ROM to form a menu.

On the [[MVS]], the settings are saved for each game in the [[backup RAM]].

The settings are copied from backup RAM to [[68k user RAM|user RAM]] to '''BIOS_GAME_DIP''' ($10FD84) just before the game is started up. If no settings are found, they're initialized to the default values.

(Does the system ROM check values pulled from the backup RAM against the bounds given by the game ? Can a corrupt backup RAM save make games crash with
out of bounds settings ?)

Software DIPs settings aren't available on the AES, the system ROM always loads the game's default values.

== Config data description ==

Most of the following information by [[User:ElBarto|ElBarto]]:

{| class="regdef" style="text-align:center;"
| '''0x00'''
| 16 bytes
| Game name, no termination char required.
|-
| '''0x10'''
| 6 bytes
| Special settings list, 4 entries. See description below.
|-
| '''0x16'''
| 10 bytes
| Simple settings list, up to 10 entries. See description below.
|-
| '''0x20'''
| x*12 bytes
| String table. Strings are 12 bytes long and padded with 0x20 (space). Max number ?
|}

===Special settings list===

The special settings list holds 4 entries: the first 2 are for time settings, and the last 2 are for count settings.

A time setting occupies one word, which defines the default value:
* The upper byte is the minutes (up to 29 ?, in BCD).
* The lower byte is the seconds (in BCD).

An unused time setting must be set to 0xFFFF.

A count setting occupies one byte, which defines the default value (not in BCD).
The first count setting can go from 1 to 99.
The second count setting is a "number of times", it can go from 0 (displayed as "WITHOUT") to 100 (displayed as "INFINITE").

An unused count setting must be set to 0xFF.

All special settings use a single string from the strings table, for the setting's name.

===Simple settings list===

Each options occupies one byte.

The upper 4 bits define the default value (starts from 0) and the lower 4 bits the number of choices.

A few games have a simple setting entry in entry #7 with a number of choices set to zero, to show a "▼NEXT PAGE" string on the bottom of the MVS menu. This is not done automatically by the system ROM.

==Examples==

<pre>
dc.b "TEST ROM " ; Game name
dc.w $FFFF ; Special settings list (none used)
dc.w $FFFF
dc.b $FF,$FF
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
; String table:
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

{|
|[[File:Config_1.png]]
|[[File:Config_2.png]]
|}

<pre>
dc.b "TEST ROM " ; Game name
dc.w $4220 ; Special setting 1: 42 minutes 20 seconds
dc.w $2042 ; Special setting 2: 20 minutes 42 seconds
dc.b $42 ; Special setting 3: 66
dc.b $64 ; Special setting 4: 100 ("INFINITE")
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b "TIMER 1 " ; Special setting 1's description
dc.b "TIMER 2 " ; Special setting 2's description
dc.b "COUNTER " ; Special setting 3's description
dc.b "COUNTER SPE " ; Special setting 4's description
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

[[File:Config_3.png]]

[[Category:Base system]]

Software DIPs

2026-05-10T16:37:18Z

Furrtek: /* Simple settings list */

[[File:Softdips.png|thumb|right|A Soft DIPs setup screen.]]

Software DIPs are a list of a maximum of 14 game-specific settings. They can be modified from the MVS [[System ROM]] menu, or with system ROM hacks for other systems.

The settings names and their possible values are stored in the game's [[68k program header]] in a specific format, read by the system ROM to form a menu.

On the [[MVS]], the settings are saved for each game in the [[backup RAM]].

The settings are copied from backup RAM to [[68k user RAM|user RAM]] to '''BIOS_GAME_DIP''' ($10FD84) just before the game is started up. If no settings are found, they're initialized to the default values.

(Does the system ROM check values pulled from the backup RAM against the bounds given by the game ? Can a corrupt backup RAM save make games crash with
out of bounds settings ?)

Software DIPs settings aren't available on the AES, the system ROM always loads the game's default values.

== Config data description ==

Most of the following information by [[User:ElBarto|ElBarto]]:

{| class="regdef" style="text-align:center;"
| '''0x00'''
| 16 bytes
| Game name, no termination char required.
|-
| '''0x10'''
| 6 bytes
| Special settings list, 4 entries. See description below.
|-
| '''0x16'''
| 10 bytes
| Simple settings list, up to 10 entries. See description below.
|-
| '''0x20'''
| x*12 bytes
| String table. Strings are 12 bytes long and padded with 0x20 (space). Max number ?
|}

===Special settings list===

The special settings list holds 4 entries: the first 2 are for time settings, and the last 2 are for count settings.

A time setting occupies one word, which defines the default value:
* The upper byte is the minutes (up to 29 ?, in BCD).
* The lower byte is the seconds (in BCD).

An unused time setting must be set to 0xFFFF.

A count setting occupies one byte, which defines the default value (not in BCD).
The first count setting can go from 1 to 99.
The second count setting is a "number of times", it can go from 0 (displayed as "WITHOUT") to 100 (displayed as "INFINITE").

An unused count setting must be set to 0xFF.

All special settings use a single string from the strings table, for the setting's name.

===Simple settings list===

Each options occupies one byte.

The upper 4 bits define the default value (starts from 0) and the lower 4 bits the number of choices.

A few games have a simple setting entry in entry #7 with a number of choices set to zero, to show a "▼NEXT PAGE" string on the bottom of the MVS menu.

==Examples==

<pre>
dc.b "TEST ROM " ; Game name
dc.w $FFFF ; Special settings list (none used)
dc.w $FFFF
dc.b $FF,$FF
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
; String table:
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

{|
|[[File:Config_1.png]]
|[[File:Config_2.png]]
|}

<pre>
dc.b "TEST ROM " ; Game name
dc.w $4220 ; Special setting 1: 42 minutes 20 seconds
dc.w $2042 ; Special setting 2: 20 minutes 42 seconds
dc.b $42 ; Special setting 3: 66
dc.b $64 ; Special setting 4: 100 ("INFINITE")
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b "TIMER 1 " ; Special setting 1's description
dc.b "TIMER 2 " ; Special setting 2's description
dc.b "COUNTER " ; Special setting 3's description
dc.b "COUNTER SPE " ; Special setting 4's description
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

[[File:Config_3.png]]

[[Category:Base system]]

Software DIPs

2026-05-10T13:36:17Z

Furrtek: /* Special settings list */

[[File:Softdips.png|thumb|right|A Soft DIPs setup screen.]]

Software DIPs are a list of a maximum of 14 game-specific settings. They can be modified from the MVS [[System ROM]] menu, or with system ROM hacks for other systems.

The settings names and their possible values are stored in the game's [[68k program header]] in a specific format, read by the system ROM to form a menu.

On the [[MVS]], the settings are saved for each game in the [[backup RAM]].

The settings are copied from backup RAM to [[68k user RAM|user RAM]] to '''BIOS_GAME_DIP''' ($10FD84) just before the game is started up. If no settings are found, they're initialized to the default values.

(Does the system ROM check values pulled from the backup RAM against the bounds given by the game ? Can a corrupt backup RAM save make games crash with
out of bounds settings ?)

Software DIPs settings aren't available on the AES, the system ROM always loads the game's default values.

== Config data description ==

Most of the following information by [[User:ElBarto|ElBarto]]:

{| class="regdef" style="text-align:center;"
| '''0x00'''
| 16 bytes
| Game name, no termination char required.
|-
| '''0x10'''
| 6 bytes
| Special settings list, 4 entries. See description below.
|-
| '''0x16'''
| 10 bytes
| Simple settings list, up to 10 entries. See description below.
|-
| '''0x20'''
| x*12 bytes
| String table. Strings are 12 bytes long and padded with 0x20 (space). Max number ?
|}

===Special settings list===

The special settings list holds 4 entries: the first 2 are for time settings, and the last 2 are for count settings.

A time setting occupies one word, which defines the default value:
* The upper byte is the minutes (up to 29 ?, in BCD).
* The lower byte is the seconds (in BCD).

An unused time setting must be set to 0xFFFF.

A count setting occupies one byte, which defines the default value (not in BCD).
The first count setting can go from 1 to 99.
The second count setting is a "number of times", it can go from 0 (displayed as "WITHOUT") to 100 (displayed as "INFINITE").

An unused count setting must be set to 0xFF.

All special settings use a single string from the strings table, for the setting's name.

===Simple settings list===

Each options occupies one byte.

The upper 4 bits define the default value (starts from 0) and the lower 4 bits the number of choices.

A few games have a simple setting entry with a number of choices set to zero, just to show a "▼NEXT PAGE" string on the bottom of the MVS menu.

==Examples==

<pre>
dc.b "TEST ROM " ; Game name
dc.w $FFFF ; Special settings list (none used)
dc.w $FFFF
dc.b $FF,$FF
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
; String table:
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

{|
|[[File:Config_1.png]]
|[[File:Config_2.png]]
|}

<pre>
dc.b "TEST ROM " ; Game name
dc.w $4220 ; Special setting 1: 42 minutes 20 seconds
dc.w $2042 ; Special setting 2: 20 minutes 42 seconds
dc.b $42 ; Special setting 3: 66
dc.b $64 ; Special setting 4: 100 ("INFINITE")
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b "TIMER 1 " ; Special setting 1's description
dc.b "TIMER 2 " ; Special setting 2's description
dc.b "COUNTER " ; Special setting 3's description
dc.b "COUNTER SPE " ; Special setting 4's description
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

[[File:Config_3.png]]

[[Category:Base system]]

NEO-FTC1B board

2026-05-08T11:24:13Z

Furrtek: /* Inputs */

[[File:Ftc1b.jpg|thumb|Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]]. EDGE1 is on the right, EDGE2 on the left.]]

[[Multiplayer]] [[extension board]] used with [[Kizuna Encounter - Super Tag Battle]] to allow 4 players to play on the same system. It forms a Y splitter with 2 [[JAMMA connector pinout|JAMMA]] edges to connect two displays, two pair of speakers and two sets of 2-player controls.

It multiplexes the inputs by using selection signals coming from a 4-wire (actually 2 used) cable that connects to the [[output port]] of the {{PCB|MV1B}} or {{PCB|MV1C}}, it also provides video signal buffering and power for the speakers ([[power amp]] under the heatsink).

=Inputs=

The {{Reg|REG_POUTPUT}} register is used to detect the board and select which set of inputs to read.
* OUT1: set selection
* OUT2: unused
* OUT3: used for board detection by some versions of the [[system ROM]]

{|class="wikitable"
!OUT1||P1 reads||P2 reads
|-
|low||EDGE 1 P1 (P1)||EDGE 2 P1 (P2)
|-
|high||EDGE 1 P2 (P3)||EDGE 2 P2 (P4)
|}

When OUT3 is high, it simulates presses on particular buttons:
* EDGE 1 player 1 (P1) button A
* EDGE 2 player 1 (P2) button A
* EDGE 1 player 2 (P3) button B
* EDGE 2 player 2 (P4) button B

=Schematic=

[[File:Ftc1b_schematic.png|800px]]

[[Category:Cartridge systems]]
[[Category:Chips]]

Kizuna Encounter - Super Tag Battle

2026-05-08T08:04:49Z

Furrtek:

{{GameInfo|right
|en_title=Kizuna Encounter - Super Tag Battle
|jp_title=Fu'un Super Tag Battle
|jp_title2=風雲スーパータッグバトル
|developer=SNK
|ngh_id=216
|megcount=242
|mvs_release=yes
|mvs_release_en=y
|mvs_release_jp=y
|mvs_romset=kizuna
|mvs_date=1996
|mvs_pchip=
|mvs_pboard=PROGTOP
|mvs_cboard=CHA256
|aes_release=y
|aes_release_jp=y
|aes_release_en=y
|aes_date=08/11/96
}}

The MVS version of this game supports 4 players when using the [[NEO-FTC1B board]] with a compatible [[MVS_board_types|MVS board]]. This is also possible on the home console by using the [[Unibios]] and a DIY adapter.

[[Category:Games]]

Unibios

2026-05-08T07:59:15Z

Furrtek: Redirected page to Universe BIOS

#REDIRECT [[Universe_BIOS]]

CARD

2026-05-02T09:31:52Z

Furrtek: /* $7: Load user name */

=CARD ($C00468)=

The CARD [[system ROM]] call is used to perform operations on the [[memory card]].

'''Warning:''' register contents aren't preserved !

==Variables==

The following variables are used when calling CARD:

{| class="regdef"
| '''Address'''
| '''DEF name'''
| '''Size'''
| '''Set by'''
| '''Description'''
|-
|$10FDC4
|BIOS_CARD_COMMAND
|byte
|System ROM or game
|Command code to execute
|-
|$10FDC6
|BIOS_CARD_ANSWER
|byte
|System ROM
|Answer code (see below)
|-
|$10FDC8
|BIOS_CARD_START
|longword
|System ROM or game
|Pointer to data
|-
|$10FDCC
|BIOS_CARD_SIZE
|word
|System ROM or game
|Size of data
|-
|$10FDCE
|BIOS_CARD_FCB
|word
|System ROM or game
|Game [[NGH number]]
|-
|$10FDD0
|BIOS_CARD_SUB
|byte or word
|System ROM or game
|Game save sub-number
|}

The following temporary variables are used when calling CARD :

{| class="regdef"
| '''Address'''
| '''DEF name'''
| '''Size'''
| '''Description'''
|-
|$10FD04
|BIOS_CARD_DIRECTORY_START
|long word
|Start of directory
|-
|$10FD08
|BIOS_CARD_BLOCK_NUMBER
|word
|Number of blocks
|-
|$10FD0A
|BIOS_CARD_FAT_START
|long word
|Start of FAT
|-
|$10FD0E
|BIOS_CARD_FAT_SIZE
|word
|Size of FAT
|-
|$10FD10
|BIOS_CARD_DATA_START
|long word
|Start of data
|-
|$10FD14
|BIOS_CARD_TYPE
|word
|
* $0 : 8 bits card
* $01 : 16 bits card
* $80 : 16 bits wide weird card (todo)
|-
|$10FD16
|BIOS_CARD_SIZE
|word
|Size of the card
|}

==BIOS_CARD_ANSWER==

This variable contains the result of the operation. Bit 7 indicates an error.

* $00: Normal completion
* $80: No card inserted
* $81: Card isn't formatted
* $82: Requested data doesn't exist
* $83: FAT error
* $84: Card is full
* $85: Write disabled or ROM card

=Commands=

==$0: Format memory card==

Formats the memory card.

==$1: Data search==

Return the number of save files for the specified game.

'''Inputs''':

BIOS_CARD_FCB must contain the NGH number of the desired game.

'''Outputs''':

BIOS_CARD_SUB contains a 16 bit mask for all 16 available blocks for the game. If a bit is set, then the corresponding save block exists.

==$2: Load data==

Loads the specified save file in RAM.

'''Inputs''':

* BIOS_CARD_FCB must contain the NGH number of the desired game.
* BIOS_CARD_SUB must contain the game save number (16 max. per game).
* BIOS_CARD_START must be a pointer to which the save data will be loaded.
* BIOS_CARD_SIZE must contain the size of the save (usually 64 bytes).

==$3: Save data==

Save from RAM to the specified save file.

'''Inputs''':

* BIOS_CARD_FCB must contain the NGH number of the desired game.
* BIOS_CARD_SUB must contain the game save number (16 max. per game).
* BIOS_CARD_START must be a pointer from which the save data will be copied.
* BIOS_CARD_SIZE must contain the size of the save (usually 64 bytes).

==$4: Delete data==

Delete the specified file.

'''Inputs''':

* BIOS_CARD_FCB must contain the NGH number of the desired game.
* BIOS_CARD_SUB must contain the game save number (16 max. per game).

==$5: Read data title==

Read the data title of a save file.

'''Inputs''':

* BIOS_CARD_START must be a pointer to which the title string will be copied.
* BIOS_CARD_SIZE must contain the game save number ?

==$6: Save user name==

Set the user name of the memory card.

'''Inputs''':

BIOS_CARD_START must be a pointer to the user name's string (max. 16 bytes).

==$7: Load user name==

Loads the user name of the memory card.

'''Inputs''':

BIOS_CARD_START must be a pointer to which the user name's string will be copied.

Can return code $82 is last character of user name field is 0.

[[Category:BIOS calls]]

System ROM tables

2026-04-20T13:09:54Z

Furrtek: /* METRIC_DATA ($C02000) */

All (?) [[system ROM]]s provide lookup tables for games to use. Red lines represent zero.

=METRIC_DATA ($C02000)=

Actually two 64, 64-entry byte tables at $C02000 and $C03000 which might be used as a 2D lookup for distance values ?

==$C02000==

Goes from 64~0 to 64~32.

[[File:Lut_metric2.png]]

==$C03000==

Goes from 0~63 to 63~89.

[[File:Lut_metric3.png]]

=SIN_DATA ($C04000)=

Two identical glitchy half-sine tables of 128 signed 16-bit words. The value overflows for one entry (at the top of the curve). There's also a glitch with two very close values in the 3rd quarter of each table.

[[File:Lut_sine.png]]

=RND_DATA ($C04200)=

256 "random" bytes. Do all values appear once ?

[[Category:Base system]]

68k instructions timings

2026-04-15T16:19:37Z

Furrtek: /* Immediate instructions */

Mirrored information from [[http://oldwww.nvg.ntnu.no/amiga/MC680x0_Sections/mc68000timing.HTML oldwww.nvg.ntnu.no]]

The number of bus '''r'''ead and '''w'''rite cycles are shown in parenthesis as (r/w). Any other cycles are internal.

In the following tables, the headings have the following meanings:
* An : Address register operand
* Dn : Data register operand
* ea : Operand specified by an effective address
* M : Memory effective address operand

To get the real execution time, multiply the total cycles count by 83.33ns ([[Clock|1/12MHz]]). An example is given in each section.

The [[68k interrupts|vertical blank]] lasts exactly 40 lines * 384 pixels * 2 cycles per pixel = 30720 cycles (2.56ms).

See [[optimization]].

=Effective address operand calculation=

This table lists the number of clock periods required to compute an instruction's effective address. It includes fetching of any extension words, the address computation, and fetching of the memory operand.

{|class="wikitable"
!Syntax||Adressing mode||B,W||L
|-
|Dn
|Data register direct
|class="green"|0(0/0)
|class="green"|0(0/0)
|-
|An
|Address register direct
|class="green"|0(0/0)
|class="green"|0(0/0)
|-
|(An)
|Address register indirect
|class="green"|4(1/0)
|class="yellow"|8(2/0)
|-
|(An)+
|Address register indirect, post inc.
|class="green"|4(1/0)
|class="yellow"|8(2/0)
|-
| -(An)
|Address register indirect, pre dec.
|class="yellow"|6(1/0)
|class="orange"|10(2/0)
|-
|d(An)
|Address register indirect, displacement
|class="yellow"|8(2/0)
|class="orange"|12(3/0)
|-
|d(An,ix)
|Address register indirect, index
|class="orange"|10(2/0)
|class="red"|14(3/0)
|-
|xxx.w
|Absolute short
|class="yellow"|8(2/0)
|class="orange"|12(3/0)
|-
|xxx.l
|Absolute long
|class="orange"|12(3/0)
|class="red"|16(4/0)
|-
|d(PC)
|PC with displacement
|class="yellow"|8(2/0)
|class="orange"|12(3/0)
|-
|d(PC,ix)
|PC with index
|class="yellow"|10(2/0)
|class="red"|14(3/0)
|-
|#xxx
|Immediate
|class="green"|4(1/0)
|class="yellow"|8(2/0)
|}

Notes:
* Pre-dec is slower than post-inc
* There are no write cycles involved in processing the effective address
* The size of the index register (ix) does not affect execution time

=Move instructions=

These following two tables indicate the number of clock periods for the move instruction. This data includes instruction fetch, operand reads, and operand writes.

==Byte and word==

Example: '''move.b (a0)+,$10201D''' (Byte (An)+ to xxx.L) takes 20 cycles.

{|class="wikitable"
!  || Dn || An || (An) || (An)+ || -(An) || d(An) || d(An,ix) || xxx.W || xxx.L
|-
!Dn
|class="green"|4(1/0)||class="green"|4(1/0)||class="green"|8(1/1)||class="green"|8(1/1)
|class="green"|8(1/1)||class="yellow"|12(2/1)||class="yellow"|14(2/1)||class="yellow"|12(2/1)||class="yellow"|16(3/1)
|-
!An
|class="green"|4(1/0)||class="green"|4(1/0)||class="green"|8(1/1)||class="green"|8(1/1)
|class="green"|8(1/1)||class="yellow"|12(2/1)||class="yellow"|14(2/1)||class="yellow"|12(2/1)||class="yellow"|16(3/1)
|-
!(An)
|class="green"|8(2/0)||class="green"|8(2/0)||class="yellow"|12(2/1)||class="yellow"|12(2/1)
|class="yellow"|12(2/1)||class="yellow"|16(3/1)||class="orange"|18(3/1)||class="yellow"|16(3/1)||class="orange"|20(4/1)
|-
!(An)+
|class="green"|8(2/0)||class="green"|8(2/0)||class="yellow"|12(2/1)||class="yellow"|12(2/1)||class="yellow"|12(2/1)
|class="yellow"|16(3/1)||class="orange"|18(3/1)||class="yellow"|16(3/1)||class="orange"|20(4/1)
|-
!-(An)
|class="green"|10(2/0)||class="green"|10(2/0)||class="yellow"|14(2/1)||class="yellow"|14(2/1)||class="yellow"|14(2/1)
|class="orange"|18(3/1)||class="orange"|20(4/1)||class="orange"|18(3/1)||class="orange"|22(4/1)
|-
!d(An)
|class="yellow"|12(3/0)||class="yellow"|12(3/0)||class="yellow"|16(3/1)||class="yellow"|16(3/1)||class="yellow"|16(3/1)
|class="orange"|20(4/1)||class="orange"|22(4/1)||class="orange"|20(4/1)||class="red"|24(5/1)
|-
!d(An,ix)
|class="yellow"|14(3/0)||class="yellow"|14(3/0)||class="orange"|18(3/1)||class="orange"|18(3/1)||class="orange"|18(3/1)
|class="orange"|22(4/1)||class="red"|24(4/1)||class="orange"|22(4/1)||class="red"|26(5/1)
|-
!xxx.W
|class="yellow"|12(3/0)||class="yellow"|12(3/0)||class="yellow"|16(3/1)||class="yellow"|16(3/1)||class="yellow"|16(3/1)
|class="orange"|20(4/1)||class="orange"|22(4/1)||class="orange"|20(4/1)||class="red"|24(5/1)
|-
!xxx.L
|class="yellow"|16(4/0)||class="yellow"|16(4/0)||class="orange"|20(4/1)||class="orange"|20(4/1)||class="orange"|20(4/1)
|class="red"|24(5/1)||class="red"|26(5/1)||class="red"|24(5/1)||class="red"|28(6/1)
|-
!d(PC)
|class="yellow"|12(3/0)||class="yellow"|12(3/0)||class="yellow"|16(3/1)||class="yellow"|16(3/1)||class="yellow"|16(3/1)
|class="orange"|20(4/1)||class="orange"|22(4/1)||class="orange"|20(4/1)||class="red"|24(5/1)
|-
!d(PC,ix)
|class="yellow"|14(3/0)||class="yellow"|14(3/0)||class="orange"|18(3/1)||class="orange"|18(3/1)||class="orange"|18(3/1)
|class="orange"|22(4/1)||class="red"|24(4/1)||class="orange"|22(4/1)||class="red"|26(5/1)
|-
!#xxx
|class="green"|8(2/0)||class="green"|8(2/0)||class="yellow"|12(2/1)||class="yellow"|12(2/1)||class="yellow"|12(2/1)
|class="yellow"|16(3/1)||class="orange"|18(3/1)||class="yellow"|16(3/1)||class="orange"|20(4/1)
|}

The size of the index register (ix) does not affect execution time.

==Long==

Example: '''move.l $05012C,4(a1,d0)''' (Long xxx.L to d(An,ix)) takes 34 cycles.

{|class="wikitable"
!  || Dn || An || (An) || (An)+ || -(An) || d(An) || d(An,ix) || xxx.W || xxx.L
|-
!Dn
|class="green"|4(1/0)||class="green"|4(1/0)||class="green"|12(1/2)||class="green"|12(1/2)||class="green"|12(1/2)
|class="yellow"|16(2/2)||class="yellow"|18(2/2)||class="yellow"|16(2/2)||class="yellow"|20(3/2)
|-
!An
|class="green"|4(1/0)||class="green"|4(1/0)||class="green"|12(1/2)||class="green"|12(1/2)||class="green"|12(1/2)
|class="yellow"|16(2/2)||class="yellow"|18(2/2)||class="yellow"|16(2/2)||class="yellow"|20(3/2)
|-
!(An)
|class="green"|12(3/0)||class="green"|12(3/0)||class="yellow"|20(3/2)||class="yellow"|20(3/2)||class="yellow"|20(3/2)
|class="orange"|24(4/2)||class="orange"|26(4/2)||class="orange"|24(4/2)||class="orange"|28(5/2)
|-
!(An)+
|class="green"|12(3/0)||class="green"|12(3/0)||class="yellow"|20(3/2)||class="yellow"|20(3/2)||class="yellow"|20(3/2)
|class="orange"|24(4/2)||class="orange"|26(4/2)||class="orange"|24(4/2)||class="orange"|28(5/2)
|-
!-(An)
|class="yellow"|14(3/0)||class="yellow"|14(3/0)||class="orange"|22(3/2)||class="orange"|22(3/2)||class="orange"|22(3/2)
|class="orange"|26(4/2)||class="orange"|28(4/2)||class="orange"|26(4/2)||class="red"|30(5/2)
|-
!d(An)
|class="yellow"|16(4/0)||class="yellow"|16(4/0)||class="orange"|24(4/2)||class="orange"|24(4/2)||class="orange"|24(4/2)
|class="orange"|28(5/2)||class="red"|30(5/2)||class="orange"|28(5/2)||class="red"|32(6/2)
|-
!d(An,ix)
|class="yellow"|18(4/0)||class="yellow"|18(4/0)||class="orange"|26(4/2)||class="orange"|26(4/2)||class="orange"|26(4/2)
|class="red"|30(5/2)||class="red"|32(5/2)||class="red"|30(5/2)||class="red"|34(6/2)
|-
!xxx.W
|class="yellow"|16(4/0)||class="yellow"|16(4/0)||class="orange"|24(4/2)||class="orange"|24(4/2)||class="orange"|24(4/2)
|class="orange"|28(5/2)||class="red"|30(5/2)||class="orange"|28(5/2)||class="red"|32(6/2)
|-
!xxx.L
|class="yellow"|20(5/0)||class="yellow"|20(5/0)||class="orange"|28(5/2)||class="orange"|28(5/2)||class="orange"|28(5/2)
|class="red"|32(6/2)||class="red"|34(6/2)||class="red"|32(6/2)||class="red"|36(7/2)
|-
!d(PC)
|class="yellow"|16(4/0)||class="yellow"|16(4/0)||class="orange"|24(4/2)||class="orange"|24(4/2)||class="orange"|24(4/2)
|class="orange"|28(5/2)||class="red"|30(5/2)||class="orange"|28(5/2)||class="red"|32(5/2)
|-
!d(PC,ix)
|class="yellow"|18(4/0)||class="yellow"|18(4/0)||class="orange"|26(4/2)||class="orange"|26(4/2)||class="orange"|26(4/2)
|class="red"|30(5/2)||class="red"|32(5/2)||class="red"|30(5/2)||class="red"|34(6/2)
|-
!#xxx
|class="green"|12(3/0)||class="green"|12(3/0)||class="yellow"|20(3/2)||class="yellow"|20(3/2)||class="yellow"|20(3/2)
|class="orange"|24(4/2)||class="orange"|26(4/2)||class="orange"|24(4/2)||class="orange"|28(5/2)
|}

The size of the index register (ix) does not affect execution time.

=Standard instructions=

Example: '''add.w d3,a7''' (Word ea Dn + An) takes 8 cycles.

The number of clock periods shown in this table indicates the time required to perform the operations, store the results and read the next instruction. The total number of clock periods must be added respectively to those of the effective address calculation where indicated (+).

{|class="wikitable"
!  || Size || <ea>,An * || <ea>,Dn || Dn,<M>
|-
!rowspan=2|ADD
|B,W
|class="orange"|8(1/0)+||class="green"|4(1/0)+||class="orange"|8(1/1)+
|-
|L
|class="yellow"|6(1/0)+**||class="yellow"|6(1/0)+**||class="red"|12(1/2)+
|-
!rowspan=2|AND
|B,W
| - ||class="green"|4(1/0)+||class="orange"|8(1/1)+
|-
|L
| - ||class="yellow"|6(1/0)+**||class="red"|12(1/2)+
|-
!rowspan=2|CMP
|B,W
|class="yellow"|6(1/0)+||class="green"|4(1/0)+|| -
|-
|L
|class="yellow"|6(1/0)+||class="yellow"|6(1/0)+|| -
|-
!DIVS
| - || - ||class="red"|158(1/0)+|| -
|-
!DIVU
| - || - ||class="red"|140(1/0)+|| -
|-
!rowspan=2|EOR
|B,W
| - ||class="green"|4(1/0) ***||class="orange"|8(1/1) +
|-
|L
| - ||class="orange"|8(1/0) ***||class="red"|12(1/2) +
|-
!MULS
| - || - ||class="red"|70(1/0)+*|| -
|-
!MULU
| - || - ||class="red"|70(1/0)+*|| -
|-
!rowspan=2|OR
|B,W
| - ||class="green"|4(1/0) +**||class="orange"|8(1/1) +
|-
|L
| - ||class="yellow"|6(1/0) +**||class="red"|12(1/2) +
|-
!rowspan=2|SUB
|B,W
|class="orange"|8(1/0)+||class="green"|4(1/0)+||class="orange"|8(1/1)+
|-
|L
|class="yellow"|6(1/0)+**||class="yellow"|6(1/0)+**||class="red"|12(1/2)+
|}

<syntaxhighlight lang="text">
notes: + Add effective address calculation time
^ Word or long only
* Indicates maximum value
** The base time of six clock periods is increased to eight
if the effective address mode is register direct or
immediate (effective address time should also be added)
*** Only available effective address mode is data register direct

DIVS,DIVU - The divide algorithm used by the MC68000 provides less
than 10% difference between the best and the worst case
timings.
MULS,MULU - The multiply algorithm requires 38+2n clocks where
n is defined as:
MULU: n = the number of ones in the <ea>
MULS: n = concatenate the <ea> with a zero as the LSB;
n is the resultant number of 10 or 01 patterns
in the 17-bit source; i.e., worst case happens
when the source is $5555
</syntaxhighlight>

=Immediate instructions=

The number of clock periods periods shown in this table includes the time to fetch immediate operands, perform the operations, store the results and read the next operation. The total number of clock periods must be added respectively to those of the effective address calculation where indicated (+).

{|class="wikitable"
!  || Size || #,Dn || #,An || #,M
|-
!rowspan=2|ADDI
|B,W
|class="green"|8(2/0)|| - ||class="yellow"|12(2/1)+
|-
|L
|class="orange"|16(3/0)|| - ||class="red"|20(3/2)+
|-
!rowspan=2|ADDQ
|B,W
|class="green"|4(1/0)||class="yellow"|8(1/0)*||class="yellow"|8(1/2)+
|-
|L
|class="yellow"|8(1/0)||class="yellow"|8(1/0)||class="orange"|12(1/2)+
|-
!rowspan=2|ANDI
|B,W
|class="green"|8(2/0)|| - ||class="yellow"|12(1/2)+
|-
|L
|class="orange"|16(3/0)|| - ||class="red"|20(3/1)+
|-
!rowspan=2|CMPI
|B,W
|class="green"|8(2/0)|| - ||class="green"|8(2/0)+
|-
|L
|class="orange"|14(3/0)|| - ||class="yellow"|12(3/1)+
|-
!rowspan=2|EORI
|B,W
|class="green"|8(2/0)|| - ||class="yellow"|12(2/1)+
|-
|L
|class="orange"|16(3/0)|| - ||class="red"|20(3/2)+
|-
!MOVEQ
|L
|class="green"|4(1/0)|| - || -
|-
!rowspan=2|ORI
|B,W
|class="green"|8(2/0)|| - ||class="yellow"|12(2/1)+
|-
|L
|class="orange"|16(3/0)|| - ||class="red"|20(3/2)+
|-
!rowspan=2|SUBI
|B,W
|class="green"|8(2/0)|| - ||class="yellow"|12(2/1)+
|-
|L
|class="orange"|16(3/0)|| - ||class="red"|20(3/2)+
|-
!rowspan=2|SUBQ
|B,W
|class="green"|4(1/0)||class="yellow"|8(1/0)*||class="yellow"|8(1/1)+
|-
|L
|class="yellow"|8(1/0)||class="yellow"|8(1/0)||class="orange"|12(1/2)+
|}

<syntaxhighlight lang="text">
+ Add effective address calculation time
* word only
</syntaxhighlight>

=Single operand instructions=

<syntaxhighlight lang="text">
This table indicates the number of clock periods for the single operand
instructions. The number of clock periods and the number of read and write cycles
must be added respectively to those of the effective address calculation
where indicated.

instruction size register memory

CLR byte,word 4(1/0) 8(1/1) +
long 6(1/0) 12(1/2) +
NBCD byte 6(1/0) 8(1/1) +
NEG byte,word 4(1/0) 8(1/1) +
long 6(1/0) 12(1/2) +
NEGX byte,word 4(1/0) 8(1/1) +
long 6(1/0) 12(1/2) +
NOT byte,word 4(1/0) 8(1/1) +
long 6(1/0) 12(1/2) +
Scc byte,false 4(1/0) 8(1/1) +
byte,true 6(1/0) 8(1/1) +
TAS # byte 4(1/0) 10(1/1) +
TST byte,word 4(1/0) 4(1/0) +
long 4(1/0) 4(1/0) +

+ add effective address calculation time
# This instruction should never be used on the Amiga as its invisiable
read/write cycle can disrupt system DMA.
</syntaxhighlight>

=Shift and rotate instructions=

<syntaxhighlight lang="text">
This table indicates the number of clock periods for the shift and rotate
instructions. The number of clock periods and the number of read and write
cycles must be added respectively to those of the effective address
calculation where indicated.

instruction size register memory

ASR,ASL byte,word 6+2n(1/0) 8(1/1) +
long 8+2n(1/0) -
LSR,LSL byte,word 6+2n(1/0) 8(1/1) +
long 8+2n(1/0) -
ROR,ROL byte,word 6+2n(1/0) 8(1/1) +
long 8+2n(1/0) -
ROXR,ROXL byte,word 6+2n(1/0) 8(1/1) +
long 8+2n(1/0) -

+ add effective address calculation time
n is the shift or rotate count
</syntaxhighlight>

=Bit manipulation instructions=

<syntaxhighlight lang="text">
This table indicates the number of clock periods required for the bit
manipulation instructions. The number of clock periods and the number of read and
write cycles must be added respectively to those of the effective address
calculation where indicated. Dynamic: register, static: immediate.

instruction size dynamic static
register memory register memory
BCHG byte - 8(1/1) + - 12(2/1) +
long 8(1/0) * - 12(2/0) * -
BCLR byte - 8(1/1) + - 12(2/1) +
long 10(1/0) * - 14(2/0) * -
BSET byte - 8(1/1) + - 12(2/1) +
long 8(1/0) * - 12(2/0) * -
BTST byte - 4(1/0) + - 8(2/0) +
long 6(1/0) - 10(2/0) -

+ add effective address calculation time
* indicates maximum value
</syntaxhighlight>

=Conditional instructions=

{|class="wikitable"
!Mnemonic || Displacement || Branch taken || Not taken
|-
|rowspan=2|Bcc
|byte
|class="yellow"|10(2/0)||class="green"|8(1/0)
|-
|word
|class="yellow"|10(2/0)||class="orange"|12(1/0)
|-
|rowspan=2|BRA
|byte
|class="yellow"|10(2/0)
|
|-
|word
|class="yellow"|10(2/0)
|
|-
|rowspan=2|BSR
|byte
|class="red"|18(2/2)
|
|-
|word
|class="red"|18(2/2)
|
|-
|rowspan=2|DBcc
|cc true
|
|class="orange"|12(2/0)
|-
|cc false
|class="yellow"|10(2/0)
|class="orange"|14(3/0)
|}

=JMP, JSR, LEA, PEA and MOVEM instructions=

<syntaxhighlight lang="text">
This Table indicates the number of clock periods required for the jump,
jump-to-subroutine, load effective address, push effective address and
move multiple registers instructions.

instr size (An) (An)+ -(An) d(An) d(An,ix)+ xxx.W xxx.L d(PC) d(PC,ix)*
JMP - 8(2/0) - - 10(2/0) 14(3/0) 10(2/0) 12(3/0) 10(2/0) 14(3/0)
JSR - 16(2/2) - - 18(2/2) 22(2/2) 18(2/2) 20(3/2) 18(2/2) 22(2/2)
LEA - 4(1/0) - - 8(2/0) 12(2/0) 8(2/0) 12(3/0) 8(2/0) 12(2/0)
PEA - 12(1/2) - - 16(2/2) 20(2/2) 16(2/2) 20(3/2) 16(2/2) 20(2/2)
MOVEM word 12+4n 12+4n - 16+4n 18+4n 16+4n 20+4n 16+4n 18+4n
M->R (3+n/0) (3+n/0) - (4+n/0) (4+n/0) (4+n/0) (5+n/0) (4+n/0) (4+n/0)
long 12+8n 12+8n - 16+8n 18+8n 16+8n 20+8n 16+8n 18+8n
(3+2n/0) (3+2n/0) - (4+2n/0) (4+2n/0) (4+2n/0) (5+2n/0) (4+2n/0) (4+2n/0)
MOVEM word 8+4n - 8+4n 12+4n 14+4n 12+4n 16+4n - -
R->M (2/n) - (2/n) (3/n) (3/n) (3/n) (4/n) - -
long 8+8n - 8+8n 12+8n 14+8n 12+8n 16+8n - -
(2/2n) - (2/2n) (3/2n) (3/2n) (3/2n) (4/2n) - -

n is the number of registers to move
* is the size of the index register (ix) does not affect the instruction's
execution time
</syntaxhighlight>

=Multi-precision instructions=

<syntaxhighlight lang="text">
This table indicates the number of clock periods for the multi-precision
instructions. The number of clock periods includes the time to fetch both
operands, perform the operations, store the results and read the next
instructions.

instruction size op Dn,Dn op M,M

ADDX byte,word 4(1/0) 18(3/1)
long 8(1/0) 30(5/2)
CMPM byte,word - 12(3/0)
long - 20(5/0)
SUBX byte,word 4(1/0) 18(3/1)
long 8(1/0) 30(5/2)
ABCD byte 6(1/0) 18(3/1)
SBCD byte 6(1/0) 18(3/1)
</syntaxhighlight>

=Miscellaneous instructions=

<syntaxhighlight lang="text">
This table indicates the number of clock periods for the following
miscellaneous instructions. The number of clock periods and plus the number
of read and write cycles must be added to those of the effective address
calculation where indicated.

instruction size register memory

ANDI to CCR byte 20(3/0) -
ANDI to SR word 20(3/0) -
CHK - 10(1/0) + -
EORI to CCR byte 20(3/0) -
EORI to SR word 20(3/0) -
ORI to CCR byte 20(3/0) -
ORI to SR word 20(3/0) -
MOVE from SR - 6(1/0) 8(1/1)+
MOVE to CCR - 12(1/0) 12(1/0)+
MOVE to SR - 12(1/0) 12(1/0)+
EXG - 6(1/0) -
EXT word 4(1/0) -
long 4(1/0) -
LINK - 16(2/2) -
MOVE from USP - 4(1/0) -
MOVE to USP - 4(1/0) -
NOP - 4(1/0) -
RESET - 132(1/0) -
RTE - 20(5/0) -
RTR - 20(5/0) -
RTS - 16(4/0) -
STOP - 4(0/0) -
SWAP - 4(1/0) -
TRAPV (No Trap) - 4(1/0) -
UNLK - 12(3/0) -

+ add effective address calculation time
</syntaxhighlight>

=Move Peripheral instructions=

<syntaxhighlight lang="text">
instruction size register->memory memory->register

MOVEP word 16(2/2) 16(4/0)
long 24(2/4) 24(6/0)
</syntaxhighlight>

=Exception processing=

<syntaxhighlight lang="text">
This table indicates the number of clock periods for exception processing.
The number of clock periods includes the time for all stacking, the vector
fetch and the fetch of the first two instruction words of the handler routine.

exception periods

address error 50(4/7)
bus error 50(4/7)
CHK instruction (trap taken) 44(5/3)+
Divide by Zero 42(5/3)
illegal instruction 34(4/3)
interrupt 44(5/3)*
privilege violation 34(4/3)
_____
RESET ** 40(6/0)
trace 34(4/3)
TRAP instruction 38(4/3)
TRAPV instruction (trap taken) 34(4/3)

+ add effective address calculation time
* the interrupt acknowledge cycle is assumed to take four
clock periods
_____ ____
** indicates the time from when RESET and HALT are first
sampled as negated to when instruction execution starts
</syntaxhighlight>

[[Category:Base system]]
[[Category:Code]]

Puzzle De Pon! R!

2026-04-02T22:43:23Z

Furrtek:

{{GameInfo|right
|en_title=Puzzle De Pon! R!
|jp_title=Puzzle De Pon! R!
|jp_title2=パズル de ポン! R
|developer=Taito (Visco license)
|editor=Visco
|ngh_id=235
|megcount=32
|mvs_release=yes
|mvs_release_en=y
|mvs_release_jp=y
|mvs_romset=puzzldpr
|mvs_date=1997
|mvs_pchip=
|mvs_pboard=PROG_4096
|mvs_cboard=CHA_42G-2
}}

Uses the same ROMs as [[Puzzle De Pon!]] (NGH 202) except for S1 and P1.

[[Category:Games]]

Neodev:Privacy policy

2026-03-21T23:00:00Z

Furrtek: Created page with "<h1>Privacy Policy</h1> <p>This Privacy Policy describes Our policies and procedures on the collection, use and disclosure of Your information when You use the Service and tells You about Your privacy rights and how the law protects You.</p> <p>We use Your Personal Data to provide and improve the Service. By using the Service, You agree to the collection and use of information in accordance with this Privacy Policy.</p> <h2>Interpretation and Definitions</h2> <h3>Interpr..."

<h1>Privacy Policy</h1>
<p>This Privacy Policy describes Our policies and procedures on the collection, use and disclosure of Your information when You use the Service and tells You about Your privacy rights and how the law protects You.</p>
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User talk:Koston

2026-03-21T21:58:46Z

Furrtek: Welcome!

'''Welcome to ''NeoGeo Development Wiki''!'''
We hope you will contribute much and well.
You will probably want to read the [https://www.mediawiki.org/wiki/Special:MyLanguage/Help:Contents help pages].
Again, welcome and have fun! [[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 22:58, 21 March 2026 (CET)

Palette RAM

2026-03-17T12:47:48Z

Furrtek:

[[File:Aes_palram.jpg|thumb|right|CXK5864 8KiB RAM chips as palette RAM in a AES system]]
[[File:CXK5864BSP-10L.jpg|thumb|right|CXK5864 8KiB RAM chips as palette RAM in a MV2F system]]
[[File:BR6265BF-10SL.jpg|thumb|right|BR6265BF 8KiB RAM chip as half of palette RAM in a MV1AX system]]

Palette RAM is 16KiB (2 banks of 256 palettes of 16, 16bit [[colors]]), it contains color data for each [[palettes|palette]].

It is accessible directly from the [[68k]] [[68k memory map|memory space]] at any time.
Pixels with incorrect colors may show if accessed during active display.

=[[Memory speed|Speed]]=

Should be 120ns or less (3mclk). Example: CXK5864BSP-10L is 100ns

[[Category:Video system]]
[[Category:Chips]]

User talk:Furrtek

2026-02-26T08:59:45Z

Furrtek:

==Cyberwillis: Hi==
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 12:59:22 AM)

Hi! Congratulations in taking the charge for the Wiki page !

I would like to understand one change that you made recently. I've noticed you have changed an information in NEO-ZMC page, regarding the bank switching activation.

From:
* Set SDA0~15 = '''$8103''', select 16KiB bank 1 in window 3 (Why $8103 and not just $0103 ?)

To:
* Set SDA0~15 = '''$810B''', select 16KiB bank 1 in window 3 (Why $810B and not just $010B ?)

This is a work I had done more or less, 22+ years ago, directly on the hardware and in fact I had published earlier a big table related to all the precise possibilities of the Chip I had found that time. [https://wiki.neogeodev.org/index.php?title=NEO-ZMC&oldid=1715 | NEO-ZMC (Table)].

There is evidence of a different ZMC release? How did you get this $810B activation?

Let me know.

: Thanks ! Hoping nothing didn't break in the transition. About the edit, it's true that setting the address bus to $xx03 would work, but that means the z80 is accessing port $03, not $0B, so that wouldn't toggle SDRD0 and wouldn't effectively set the bank. NEO-ZMC does see 3 when writing to port $0B since it's only connected to SDA0 and SDA1. I'm guessing you were manually setting the NEO-ZMC pins for your tests, not actually using the z80 to write to it ? Do you remember why you had to set SDA15 ? Looking at the logic in ZMC2, it shouldn't be required.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 03:42, 25 February 2026 (CET)
---------------
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 5:45:20 AM)

Hi again,
Sorry, the only thing i just noticed that is broken is my ZMC schematic I uploaded in 2011, for some reasn has the wrong pinouts, I will upload the correct one soon I find it.

'''Q:"I'm guessing you were manually setting the NEO-ZMC pins for your tests, not actually using the z80 to write to it ?"'''
''A: More or less like that but not manually. I sent signals from a device I had built. Before attack the the CMC I had to study the ZMC first.''

'''Q1: "NEO-ZMC does see 3 when writing to port $0B since it's only connected to SDA0 and SDA1."'''
'''Q2: "Do you remember why you had to set SDA15?"'''
''A: There aren't just 2 bits to be set. In fact are 10 bits to be set. A 4MBit M1 Rom has 32 words to correct access all the 32 banks. The lower bank being $8003 and the higher is $9F03. This is trivial for the NEO-ZMC, not so trivial for NEO-CMC that uses the same logic plus a Checksum key to keep everything sinchronized and being decrypted.''

We were only talking about NEO-ZMC, and the bits required to select the window are SDA[1:0]. SDA[15:8] is used as data to set the bank #, yes.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 06:52, 25 February 2026 (CET)

'''Q: Looking at the logic in ZMC2, it shouldn't be required'''
''A: I didn't had an AES cartridge in hand to test it out. The ZMC seems to be embedded in ZMC2 in some way, because ZMC behaves the same way in CMC AES and MVS, with different set of pins for Cs and S''

Yes the ZMC logic is in ZMC2. Logic in CMC is a different story.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 06:52, 25 February 2026 (CET)

'''Q: Why $8003 and not just $0003 ?'''
''A: I believe the Z80 access the M1 as if was a RAM ($8000-$FFFF) opposed to ROM space ($0000-$7FFF), to mirror the bank on internal RAM. The M1 is being accessed all the time after millisseconds the hardware is turned on''

That's a port address, not memory. Window 3 only has a 5-bit latch for its bank number, so SDA[15:13] don't matter.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 06:52, 25 February 2026 (CET)

-------------------------
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 7:24:31 AM)

'''We were only talking about NEO-ZMC, and the bits required to select the window are SDA[1:0]. SDA[15:8] is used as data to set the bank #, yes.'''
''Yes we are still only talking about ZMC, may be technically be different from the point of view of the Z80 but to me is the same, because I had to access ZMC / CMC to get access to M1 in the same way. This is what I tried to let it clear. If you had confirmed that to access the ZMC / CMC (transparent to NEO-GEO) needs a '''B''' but for the ZMC point of view it sees a '''3''', what is the correct pattern to use ? We will talk about components in the point of view of the processor accessing it or the point of view of what the chip need to be setted ? ''

It's true that it's the NEO-ZMC component page, but since it's only meant to be used in a specific way (haven't seen it used outside of Neogeo carts), I find it clearer to mention $0B instead of $03 to match the z80 port that must be used. I think readers who want to mess with the chip signals directly will figure out that SDA[7:2] aren't connected and only SDA[1:0] matters to the chip. --[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 08:43, 25 February 2026 (CET)

'''Yes the ZMC logic is in ZMC2. Logic in CMC is a different story.'''
''What do you mean a different story? Ignoring the part of the Scramble and ignoring the part of S1 and Cs is the same ZMC there that has to be accessed the same way, what part of this is not clear?''

Ok, good to know the ZMC logic hasn't evolved in CMC. --[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 08:43, 25 February 2026 (CET)

-------------------------
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 3:54:43 PM)
'''It's true that it's the NEO-ZMC component page, but since it's only meant to be used in a specific way (haven't seen it used outside of Neogeo carts), I find it clearer to mention $0B instead of $03 to match the z80 port that must be used. I think readers who want to mess with the chip signals directly will figure out that SDA[7:2] aren't connected and only SDA[1:0] matters to the chip.'''
''Ok, help me out here to understand your point, lets walk though the setting of '''second''' bank:''
- ''SRD0 set to 0 (write mode)''
- ''With P15~0 receiving $8103 (1000 0001 0000 0011), ZMC will receive '''$207''' (10000001------11 => 10 0000 0111).''
- ''SRD0 should change to lock the bank set: 0 to 1 (fix bank)''
- ''SRD0 should keep in 1 (read mode)''
- ''With P15~0 receiving '''$8000~$BFFF''', the ZMC will be now mapping to the range '''$4000~7FFF''' at the M1.''
- sure the a0 a1 as 00, 01, 10, 11 will set different banking ranges in total: 00=64k m1, 01=128K m1, 10=256K m1, 11=512K m1.
''In the page you said, instead $8103, the Z80 send $810B. The point is, how the Z80 sending $810B will be converted to P15~0 receiving $8103?''

-------------------------
--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 23:30, 25 February 2026 (CET)
$810B: 1000000100001011 full SDA[15:0] bus
$8103: 10000001------11 as seen by NEO-ZMC
-------------------------
([[User_talk:Cyberwillis|Cyberwillis]]: Thursday, February 26, 2026 at 8:41:34 AM)
Ok. I was thinking there was more into it, or some kind of limitation from the z80, and I was wondering how then it would be able to later cover all the range of the memory if from setting the banking would have such limitation.
I will review the WORD setting if was really necessary SDA15=1 or was just a convenience.
Thank you for the clarifications !

-------------------------
--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 09:59, 26 February 2026 (CET)
Nothing more than that ! I'm curious now, were you involved with figuring out the decryption / emulation of CMC games ? I don't know the backstory behind that.

User talk:Furrtek

2026-02-26T08:59:22Z

Furrtek:

User talk:Furrtek

2026-02-25T22:32:18Z

Furrtek:

User talk:Furrtek

2026-02-25T22:30:19Z

Furrtek:

==Cyberwillis: Hi==
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 12:59:22 AM)

Hi! Congratulations in taking the charge for the Wiki page !

I would like to understand one change that you made recently. I've noticed you have changed an information in NEO-ZMC page, regarding the bank switching activation.

From:
* Set SDA0~15 = '''$8103''', select 16KiB bank 1 in window 3 (Why $8103 and not just $0103 ?)

To:
* Set SDA0~15 = '''$810B''', select 16KiB bank 1 in window 3 (Why $810B and not just $010B ?)

This is a work I had done more or less, 22+ years ago, directly on the hardware and in fact I had published earlier a big table related to all the precise possibilities of the Chip I had found that time. [https://wiki.neogeodev.org/index.php?title=NEO-ZMC&oldid=1715 | NEO-ZMC (Table)].

There is evidence of a different ZMC release? How did you get this $810B activation?

Let me know.

: Thanks ! Hoping nothing didn't break in the transition. About the edit, it's true that setting the address bus to $xx03 would work, but that means the z80 is accessing port $03, not $0B, so that wouldn't toggle SDRD0 and wouldn't effectively set the bank. NEO-ZMC does see 3 when writing to port $0B since it's only connected to SDA0 and SDA1. I'm guessing you were manually setting the NEO-ZMC pins for your tests, not actually using the z80 to write to it ? Do you remember why you had to set SDA15 ? Looking at the logic in ZMC2, it shouldn't be required.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 03:42, 25 February 2026 (CET)
---------------
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 5:45:20 AM)

Hi again,
Sorry, the only thing i just noticed that is broken is my ZMC schematic I uploaded in 2011, for some reasn has the wrong pinouts, I will upload the correct one soon I find it.

'''Q:"I'm guessing you were manually setting the NEO-ZMC pins for your tests, not actually using the z80 to write to it ?"'''
''A: More or less like that but not manually. I sent signals from a device I had built. Before attack the the CMC I had to study the ZMC first.''

'''Q1: "NEO-ZMC does see 3 when writing to port $0B since it's only connected to SDA0 and SDA1."'''
'''Q2: "Do you remember why you had to set SDA15?"'''
''A: There aren't just 2 bits to be set. In fact are 10 bits to be set. A 4MBit M1 Rom has 32 words to correct access all the 32 banks. The lower bank being $8003 and the higher is $9F03. This is trivial for the NEO-ZMC, not so trivial for NEO-CMC that uses the same logic plus a Checksum key to keep everything sinchronized and being decrypted.''

We were only talking about NEO-ZMC, and the bits required to select the window are SDA[1:0]. SDA[15:8] is used as data to set the bank #, yes.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 06:52, 25 February 2026 (CET)

'''Q: Looking at the logic in ZMC2, it shouldn't be required'''
''A: I didn't had an AES cartridge in hand to test it out. The ZMC seems to be embedded in ZMC2 in some way, because ZMC behaves the same way in CMC AES and MVS, with different set of pins for Cs and S''

Yes the ZMC logic is in ZMC2. Logic in CMC is a different story.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 06:52, 25 February 2026 (CET)

'''Q: Why $8003 and not just $0003 ?'''
''A: I believe the Z80 access the M1 as if was a RAM ($8000-$FFFF) opposed to ROM space ($0000-$7FFF), to mirror the bank on internal RAM. The M1 is being accessed all the time after millisseconds the hardware is turned on''

That's a port address, not memory. Window 3 only has a 5-bit latch for its bank number, so SDA[15:13] don't matter.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 06:52, 25 February 2026 (CET)

-------------------------
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 7:24:31 AM)

'''We were only talking about NEO-ZMC, and the bits required to select the window are SDA[1:0]. SDA[15:8] is used as data to set the bank #, yes.'''
''Yes we are still only talking about ZMC, may be technically be different from the point of view of the Z80 but to me is the same, because I had to access ZMC / CMC to get access to M1 in the same way. This is what I tried to let it clear. If you had confirmed that to access the ZMC / CMC (transparent to NEO-GEO) needs a '''B''' but for the ZMC point of view it sees a '''3''', what is the correct pattern to use ? We will talk about components in the point of view of the processor accessing it or the point of view of what the chip need to be setted ? ''

It's true that it's the NEO-ZMC component page, but since it's only meant to be used in a specific way (haven't seen it used outside of Neogeo carts), I find it clearer to mention $0B instead of $03 to match the z80 port that must be used. I think readers who want to mess with the chip signals directly will figure out that SDA[7:2] aren't connected and only SDA[1:0] matters to the chip. --[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 08:43, 25 February 2026 (CET)

'''Yes the ZMC logic is in ZMC2. Logic in CMC is a different story.'''
''What do you mean a different story? Ignoring the part of the Scramble and ignoring the part of S1 and Cs is the same ZMC there that has to be accessed the same way, what part of this is not clear?''

Ok, good to know the ZMC logic hasn't evolved in CMC. --[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 08:43, 25 February 2026 (CET)

-------------------------
([[User_talk:Cyberwillis|Cyberwillis]]: Wednesday, February 25, 2026 3:54:43 PM)
'''It's true that it's the NEO-ZMC component page, but since it's only meant to be used in a specific way (haven't seen it used outside of Neogeo carts), I find it clearer to mention $0B instead of $03 to match the z80 port that must be used. I think readers who want to mess with the chip signals directly will figure out that SDA[7:2] aren't connected and only SDA[1:0] matters to the chip.'''
''Ok, help me out here to understand your point, lets walk though the setting of '''second''' bank:''
- ''SRD0 set to 0 (write mode)''
- ''With P15~0 receiving $8103 (1000 0001 0000 0011), ZMC will receive '''$207''' (10000001------11 => 10 0000 0111).''
- ''SRD0 should change to lock the bank set: 0 to 1 (fix bank)''
- ''SRD0 should keep in 1 (read mode)''
- ''With P15~0 receiving '''$8000~$BFFF''', the ZMC will be now mapping to the range '''$4000~7FFF''' at the M1.''
- sure the a0 a1 as 00, 01, 10, 11 will set different banking ranges in total: 00=64k m1, 01=128K m1, 10=256K m1, 11=512K m1.
''In the page you said, instead $8103, the Z80 send $810B. The point is, how the Z80 sending $810B will be converted to P15~0 receiving $8103?''

-------------------------
--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 23:30, 25 February 2026 (CET)
'''
$810B: 1000000100001011 full SDA[15:0] bus
$8103: 10000001------11 as seen by NEO-ZMC
'''

NEO-ZMC

2026-02-25T07:48:05Z

Furrtek:

{{ChipInfo
|picture=crt_zmc.jpg
|pkg=SOIC24
|manu=fujitsu
|date=1991 ?
|gates=
|used_on=[[cartridges]]
}}

{{Chipname|Z80}} '''M'''emory '''C'''ontroller. Handles the [[Z80]] bankswitching in cartridges. To save pins, the Z80's upper address line are also used as data input. The chip's write strobe SDRD0 is [[Z80 port map|port]] address decoded inside the system when SDA[3:2] = 2 (ports $8~$B).

Internal logic: [https://github.com/furrtek/Neogeo_MiSTer_old/blob/master/io/zmc.v zmc.v (verilog)]

=Pinout=

{{Pinout|NEO-ZMC|512}}

Pins 10, 11, 12 may be M1 higher address bits ?

* SDA0, SDA1, SDA8~15: Z80 address bus
* M1 A11~M1 A18: [[M1 ROM]] address lines
* SDRD0: Decoded write signal from {{Chipname|NEO-D0}} (latch on rising edge)

=Operation=

SDA8~SDA15 are used for the bank number (data), SDA0 and SDA1 for selecting the window.

{|class="wikitable"
!SDA1
!SDA0
!Z80 port
!Window
!Address range
!Size
!Latch size
|-
|0||0||$08||0||$F000~$F7FF||2KiB||8 bits
|-
|0||1||$09||1||$E000~$EFFF||4KiB||7 bits
|-
|1||0||$0A||2||$C000~$DFFF||8KiB||6 bits
|-
|1||1||$0B||3||$8000~$BFFF||16KiB||5 bits
|}

==Details==
[[File:Neo-zmz_operation.png|thumb]]

SDRD0 must be high before configuring banks.

To configure a bank to be accessed (e.g. bank 1 in the $8000~$BFFF range):
* Set SDRD0 low (prepare for new bank configuration, outputs are tri-stated)
* Set SDA0~15 = '''$810B''', select 16KiB bank 1 in window 3 (Why $810B and not just $010B ?)
* Set SDRD0 high (latch bank, ready to convert inputs to proper output signals)
* Now, when the Z80 reads the '''$8000~BFFF''' range, NEO-ZMC will map this to the M1 ROM zone '''$04000~$07FFF'''

[[Category:Audio system]]
[[Category:Chips]]

NEO-ZMC

2026-02-25T07:46:44Z

Furrtek: Link to verilog

{{ChipInfo
|picture=crt_zmc.jpg
|pkg=SOIC24
|manu=fujitsu
|date=1991 ?
|gates=
|used_on=[[cartridges]]
}}

{{Chipname|Z80}} '''M'''emory '''C'''ontroller. Handles the [[Z80]] bankswitching in cartridges. To save pins, the Z80's upper address line are also used as data input. The chip's write strobe SDRD0 is [[Z80 port map|port]] address decoded inside the system.

Internal logic: [https://github.com/furrtek/Neogeo_MiSTer_old/blob/master/io/zmc.v zmc.v (verilog)]

=Pinout=

{{Pinout|NEO-ZMC|512}}

Pins 10, 11, 12 may be M1 higher address bits ?

* SDA0, SDA1, SDA8~15: Z80 address bus
* M1 A11~M1 A18: [[M1 ROM]] address lines
* SDRD0: Decoded write signal from {{Chipname|NEO-D0}} (latch on rising edge)

=Operation=

SDA8~SDA15 are used for the bank number (data), SDA0 and SDA1 for selecting the window.

{|class="wikitable"
!SDA1
!SDA0
!Z80 port
!Window
!Address range
!Size
!Latch size
|-
|0||0||$08||0||$F000~$F7FF||2KiB||8 bits
|-
|0||1||$09||1||$E000~$EFFF||4KiB||7 bits
|-
|1||0||$0A||2||$C000~$DFFF||8KiB||6 bits
|-
|1||1||$0B||3||$8000~$BFFF||16KiB||5 bits
|}

==Details==
[[File:Neo-zmz_operation.png|thumb]]

SDRD0 must be high before configuring banks.

To configure a bank to be accessed (e.g. bank 1 in the $8000~$BFFF range):
* Set SDRD0 low (prepare for new bank configuration, outputs are tri-stated)
* Set SDA0~15 = '''$810B''', select 16KiB bank 1 in window 3 (Why $810B and not just $010B ?)
* Set SDRD0 high (latch bank, ready to convert inputs to proper output signals)
* Now, when the Z80 reads the '''$8000~BFFF''' range, NEO-ZMC will map this to the M1 ROM zone '''$04000~$07FFF'''

[[Category:Audio system]]
[[Category:Chips]]

User talk:Furrtek

2026-02-25T07:43:27Z

Furrtek:

User talk:Furrtek

2026-02-25T05:52:11Z

Furrtek:

NEO-ZMC2

2026-02-25T02:58:41Z

Furrtek:

{{ChipInfo
|picture=mvs_zmc2.jpg
|pkg=QFP80R
|manu=fujitsu
|date=1990
|gates=
|used_on={{PCB|MV1FZS}} [[Cartridges]]...
}}

{{Chipname|NEO-ZMC}} and {{Chipname|PRO-CT0}} in one package.

Can address up to 4MiB of [[M1 ROM]].

Found in second revision [[MVS hardware|MVS]] boards (for the PRO-CT0 logic only), and AES cartridges.

=Pinout=

{{Pinout|NEO-ZMC2|640px}}

NEO-ZMC part:
*SDA0,SDA1,SDA8~SDA15: [[Z80]] address bus
*MA11~MA21: M ROM address outputs

PRO-CT0 part, inputs:
*12M: 12MHz clock, outputs next pixel on falling edge.
*C0~C31: C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
*H: When high, reverse bit order of pixels shifted out (used for [[sprites]] horizontal flipping)
*EVEN: Swap A/B pixels.
*LOAD: Latch C ROM data on rising edge of 12M.
Outputs:
*DOTA: High when pixel A is opaque (color > 0)
*DOTB: High when pixel B is opaque (color > 0)
*GAD0~GAD3: Pixel A color index
*GBD0~GBD3: Pixel B color index

=Signals=

[[File:Spr signals.png]]

[[Category:Chips]]

File:Spr signals.png

2026-02-25T02:57:42Z

Furrtek:

Scope capture of 12M, EVEN and LOAD signals

PRO-CT0

2026-02-25T02:54:37Z

Furrtek:

{{ChipInfo
|picture=mvs_pro-ct0.jpg
|pkg=SDIP64
|manu=nec
|date=1990 ?
|gates=
|used_on={{PCB|MV4}} [[Cartridges]]...
}}

PRO-CT0 (also known as SNK-9201 and ALPHA-8921) is an early gate array chip which serializes sprite graphics in AES cartridges and [[MVS hardware|MVS]] boards. It was later replaced by {{Chipname|NEO-ZMC2}} and then {{Chipname|NEO-CMC}}.

It was also used as a challenge-response "security" device in [[Super Sidekicks]] and [[Fatal Fury 2]] cartridges.

ALPHA-8921 is the original chip name, from when [[Alpha Denshi]] were using it on their [[Alpha68k]] system.

=Pinouts=
{|align="center"
!Sprite graphics serializer
!Security device
|-
|[[File:pro-ct0_pinout.png]]
|[[File:snk-9201_pinout.png]]
|-
|Info by [[User:Kyuusaku]]
|
*D0~D15: 68k data bus
*A1~A19: 68k address bus
*D0out~D7out: output to a LS245 which puts the data on
the 68k bus when /PORTOEL is low ($200000-$2FFFFF odd byte read).
|}

=Internal logic=

[[User:Kyuusaku|Kyuusaku]]'s Verilog definition: [[File:Ct0.zip]]

[[User:furrtek|furrtek]]'s version:

[[File:proct0_ftk.png|640px]]

=Normal use: graphics serializer=

See [[NEO-ZMC2]].

=Derivate use: security device=

[[File:proct0prog.jpg|thumb|PRO-CT0 9042KX023 on an AES cart [[PROG board]].]]

[[File:crt_snk-9201.jpg|right|thumb|SNK-9201 chip found in a [[Super Sidekicks]] MVS cartridge. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]]

As a security device, the chip is only found on [[PROG board#PROG-G2|PROG-G2]] boards for [[Fatal Fury 2]] and [[Super Sidekicks]]. It was SNK's first attempt at copy-protecting NeoGeo games. The point was to make the game check for the presence of the chip, taking advantage of its relatively hard to guess logic.

The game programs expect the chip to reply with specific data depending on the values written to it. If the values don't match, then the game assumes it's a copy and silently sets a flag which triggers deliberate bugs during gameplay (see game pages for details).

The chip is tied to the [[68k]] address and data bus, it reacts to word writes and replies on odd addresses in the [[68k memory map|$200000-$2FFFFF]] address range. Games use several unnecessary complicated bogus addresses in that range to make things look more complicated than they are.

==Input==
Address bus mapping:
{|class="wikitable"
|A19||A18||A17||A16||A15||A14||A13||A12||A11||A10||A9||A8||A7||A6||A5||A4||A3||A2||/PORTWEL||A1
|-
|C31||C29||C27||C25||C30||C28||C26||C24||C23||C21||C19||C17||C22||C20||C18||C16||H||EVEN||12M||LOAD
|}

Data bus mapping:
{|class="wikitable"
|D15||D14||D13||D12||D11||D10||D9||D8||D7||D6||D5||D4||D3||D2||D1||D0
|-
|C15||C13||C11||C9||C14||C12||C10||C8||C7||C5||C3||C1||C6||C4||C2||C0
|}

==Output==

Data bus mapping:
{|class="wikitable"
|D7||D6||D5||D4||D3||D2||D1||D0
|-
|GBD1||GBD0||GBD3||GBD2||GAD1||GAD0||GAD3||GAD2
|}

[[Category:Chips]]

User talk:Furrtek

2026-02-25T02:42:41Z

Furrtek:

==Cyberwillis: Hi==
(Wednesday, February 25, 2026 12:59:22 AM)

Hi! Congratulations in taking the charge for the Wiki page !

I would like to understand one change that you made recently. I've noticed you have changed an information in NEO-ZMC page, regarding the bank switching activation.

From:
* Set SDA0~15 = '''$8103''', select 16KiB bank 1 in window 3 (Why $8103 and not just $0103 ?)

To:
* Set SDA0~15 = '''$810B''', select 16KiB bank 1 in window 3 (Why $810B and not just $010B ?)

This is a work I had done more or less, 22+ years ago, directly on the hardware and in fact I had published earlier a big table related to all the precise possibilities of the Chip I had found that time. [https://wiki.neogeodev.org/index.php?title=NEO-ZMC&oldid=1715 | NEO-ZMC (Table)].

There is evidence of a different ZMC release? How did you get this $810B activation?

Let me know.

: Thanks ! Hoping nothing didn't break in the transition. About the edit, it's true that setting the address bus to $xx03 would work, but that means the z80 is accessing port $03, not $0B, so that wouldn't toggle SDRD0 and wouldn't effectively set the bank. NEO-ZMC does see 3 when writing to port $0B since it's only connected to SDA0 and SDA1. I'm guessing you were manually setting the NEO-ZMC pins for your tests, not actually using the z80 to write to it ? Do you remember why you had to set SDA15 ? Looking at the logic in ZMC2, it shouldn't be required.--[[User:Furrtek|Furrtek]] ([[User talk:Furrtek|talk]]) 03:42, 25 February 2026 (CET)

Bankswitching

2026-02-25T00:37:39Z

Furrtek:

Games which need more than 2MiB of [[P ROM]] data use simple bankswitching in the [[68k memory map|PORT memory range]] ($200000~$2FFFFF), which is achieved in hardware by latches on the cartridge's [[PROG board]]. No games use bankswitching of the ROM range ($000000~$1FFFFF) ?

To switch the ROM bank, a byte needs to be written in this range. Depending on how large the ROM is, one or more bits can be used.

[[File:Pbankswitch.png|thumb|300px]]

For example, the PROGBK1 board uses a 74LS74 dual D-latch to allow a 4MiB P2 ROM to be mapped in 4, 1MiB banks (2 bits, see schematic).

In this case, when a word write or an odd byte write is done in the $200000~$2FFFFF range, /PORTWEL falls, latching D0 and D1 which are output to the P2 ROM's A20 and A21 lines respectively.
When the system is reset, both latches are reset to 0, to ensure that the first bank is mapped on startup.

As there is no /PORTOE signal on the cartridge edge (like /ROMOE), both /PORTOEL and /PORTOEU need to be ANDed together to make the /OE signal of P2.

===Example code===

<pre>
move.w #3,#$200000 ; Set bank 3, ROM's $300000~$3FFFFF appears in $200000~$2FFFFF
move.b #1,#$2B92F1 ; Set bank 1, ROM's $100000~$1FFFFF appears in $200000~$2FFFFF
</pre>

[[Category:Cartridge systems]]
[[Category:Chips]]

Bankswitching

2026-02-25T00:34:59Z

Furrtek: /* Example code */

Games which need more than 2MiB of [[P ROM]] data use simple bankswitching in the [[68k memory map|PORT memory range]] ($200000~$2FFFFF), which is achieved in hardware by latches on the cartridge's [[PROG board]]. No games use bankswitching of the ROM range ($000000~$1FFFFF) ?

To switch the ROM bank, a byte needs to be written in this range. Depending on how large the ROM is, one or more bits can be used.

[[File:Pbankswitch.png|thumb|300px]]

For example, the PROGBK1 board uses a 74LS74 dual D-latch to allow a 4MiB P2 ROM to be mapped in 4, 1MiB banks (2 bits, see schematic).

In this case, when a byte write is done in the $200000~$2FFFFF range, /PORTWEL falls, latching D0 and D1 which are connected to the P2 ROM's A20 and A21 lines respectively.
When the NeoGeo is reset, both latches are reset to 0, to ensure that the first bank is mapped on startup.

As there is no /PORTOE signal on the cartridge edge (like /ROMOE), both /PORTOEL and /PORTOEU need to be ANDed together to make the /OE signal of P2 (if it's a 16bit ROM).

===Example code===

<pre>
move.w #3,#$200000 ; Set bank 3, ROM's $300000~$3FFFFF appears in $200000~$2FFFFF
move.b #1,#$2B92F1 ; Set bank 1, ROM's $100000~$1FFFFF appears in $200000~$2FFFFF
</pre>

[[Category:Cartridge systems]]
[[Category:Chips]]

Bankswitching

2026-02-25T00:34:37Z

Furrtek: /* Example code */

Games which need more than 2MiB of [[P ROM]] data use simple bankswitching in the [[68k memory map|PORT memory range]] ($200000~$2FFFFF), which is achieved in hardware by latches on the cartridge's [[PROG board]]. No games use bankswitching of the ROM range ($000000~$1FFFFF) ?

To switch the ROM bank, a byte needs to be written in this range. Depending on how large the ROM is, one or more bits can be used.

[[File:Pbankswitch.png|thumb|300px]]

For example, the PROGBK1 board uses a 74LS74 dual D-latch to allow a 4MiB P2 ROM to be mapped in 4, 1MiB banks (2 bits, see schematic).

In this case, when a byte write is done in the $200000~$2FFFFF range, /PORTWEL falls, latching D0 and D1 which are connected to the P2 ROM's A20 and A21 lines respectively.
When the NeoGeo is reset, both latches are reset to 0, to ensure that the first bank is mapped on startup.

As there is no /PORTOE signal on the cartridge edge (like /ROMOE), both /PORTOEL and /PORTOEU need to be ANDed together to make the /OE signal of P2 (if it's a 16bit ROM).

===Example code===

<pre>
move.w #3,#$200000 ; Set bank 3, ROM's $300000~$3FFFFF appears in $200000~$2FFFFF
move.w #1,#$2B92F1 ; Set bank 1, ROM's $100000~$1FFFFF appears in $200000~$2FFFFF
</pre>

[[Category:Cartridge systems]]
[[Category:Chips]]

Z80 port map

2026-02-24T03:11:57Z

Furrtek:

Some infos from [[User:kyuusaku]]

The decode mask for '''reading''' ports is always $0C. The one for writes is indicated for each case.

{| class="regdef"
|'''Address'''
|'''Read'''
|'''Write'''
|-
|$00
|
*Read [[68k/Z80_communication|command byte]] that was written by {{Chipname|68k}}
*Acknowledge [[Z80 interrupts|NMI]]
Active signal: {{Sig|SDZ80R|SDZ80R}}
|Clear sound code from 68k to $00
Active signal: {{Sig|SDZ80CLR|SDZ80CLR}}

Decode mask: $0C
|-
|$04~$07
|[[YM2610]] read
Active signal: {{Sig|2610RD|2610RD}}
|[[YM2610]] write
Active signal: {{Sig|2610WR|2610WR}}

Decode mask: $0C
|-
|$08
|Set [[Z80 memory map|$F000~$F7FF]] bank

Active signal: {{Sig|SDRD0|SDRD0}}
|rowspan="4"|Enable NMIs

Decode mask: $1C
|-
|$09
|Set $E000~$EFFF bank

Active signal: {{Sig|SDRD0|SDRD0}}
|-
|$0A
|Set $C000~$DFFF bank

Active signal: {{Sig|SDRD0|SDRD0}}
|-
|$0B
|Set $8000~$BFFF bank

Active signal: {{Sig|SDRD0|SDRD0}}
|-
|$0C
|See {{Sig|SDRD1|SDRD1}}. Never used by any game ?
|Write reply byte to 68k
Active signal: {{Sig|SDZ80W|SDZ80W}}

Decode mask: $0C
|-
|$18
|Same as range $08~$0B
|Disable NMIs

Decode mask: $1C
|}

Note that the [[M1 ROM|Z80 ROM]] [[Z80 bankswitching|bank selection]] is done by '''reading''' ports.

SNK used an obscure feature of the Z80: when accessing ports, the entire address bus is set with A-port or register pair BC, not only the lower 8 bits.

The banks can then be chosen by putting the bank number in register B, the port number ($8 to $B) in register C, and doing IN A,(C), discarding register A.

This also works when putting the bank number in register A and doing IN A,(port).

This is handled by {{Chipname|NEO-ZMC}} in cartridges.

Some [[sound driver]]s use port $C0 (and others ?) in their code. Since only SDA2 and SDA3 are used for port decoding, port $C0 maps to a mirror of port $00. It's believed to be a remnant of some development tool.

[[Category:Base system]]
[[Category:Audio system]]

Z80

2026-02-23T19:04:39Z

Furrtek: /* Interrupts */

[[File:cd2_z80.jpg|right|thumb|Z80 in a surface mount package, as found on some MVS and CD boards.]]

The Z80 is a 8-bit little-endian CPU designed by Zilog.

It is used in NeoGeo systems as a sub-CPU to handle sound and music playback. It runs at [[clock|4MHz]] and only has access to the {{Chipname|YM2610}}, the {{Chipname|M1 ROM}} (or [[Z80 file]]s), and its [[Z80 RAM|own RAM]]. It communicates with the {{Chipname|68k}} CPU via a [[68k/Z80 communication|single-byte channel]].

Because it doesn't share a RAM area with the 68k CPU like on the Sega Genesis, it can't be used efficiently to offload game computation tasks from the main CPU.

Also see:
* [[Z80 port map]]
* [[Z80 bankswitching]]

[[File:aes_z80.jpg|right|thumb|Z80 in DIP package, as found on AES boards.]]

=Interrupts=

* IRQs (address $38) are triggered by the YM2610 timers, if enabled.
* An NMI (address $66) is triggered when the 68k sends a command byte, if enabled.

=Memory map=

[[File:Z80mmap.png|thumb|Visualization of the Z80's memory map (proportional areas).]]

==Cartridge systems==

{| class="regdef"
|'''Start'''
|'''End'''
|'''Size'''
|'''Description'''
|-
|$0000
|$7FFF
|32KiB
|Static main code bank (start of the [[M1 ROM]])
|-
|$8000
|$BFFF
|16KiB
|Switching window 3
|-
|$C000
|$DFFF
|8KiB
|Switching window 2
|-
|$E000
|$EFFF
|4KiB
|Switching window 1
|-
|$F000
|$F7FF
|2KiB
|Switching window 0
|-
|$F800
|$FFFF
|2KiB
|[[Z80 RAM|Work RAM]]
|}

Having a 16-bit address bus, the {{Chipname|Z80}} CPU allows access to 64KiB of memory at most. In NeoGeo [[cartridges]], the {{Chipname|NEO-ZMC}} or {{Chipname|NEO-ZMC2}} chips provide a way to access more memory for [[M1 ROM]]s up to 4MiB. Four different switchable zones ("windows") are available.

The bank that appear in these windows are configured by '''reading''' from 4 of the Z80's [[Z80 port map|ports]] (see page for explanation).

Bank offsets numbering depend on the window sizes:

* Window 0 counts in 2KiB increments
* Window 1 in 4KiB
* Window 2 in 8KiB
* Window 3 in 16KiB

On cartridge systems, all windows are initialized to 0 (verified on hardware). Many [[sound driver]]s start up by initializing the windows properly like indicated above.

For example, this code simply maps the Z80 $0000~$F7FF address range to M1 ROM $0000~$F7FF linearly, with no gaps.

<pre>
ld a,$1E
in a,($08) ; Set window 0 at $1E*$800 = $F000
ld a,$0E
in a,($09) ; Set window 1 at $E*$1000 = $E000
ld a,$06
in a,($0A) ; Set window 2 at $6*$2000 = $C000
ld a,$02
in a,($0B) ; Set window 3 at $2*$4000 = $8000
</pre>

===Bank selection===

[[The King of Fighters '97]] does this:

<pre>
; 32KiB bank number in A
rlca
rlca
ld e,a
ld d,$00 ; DE = A * 4 (table entry size)
ld hl,$289C ; Table address, see below
add hl,de
ld a,(hl)
in a,($08) ; Set zone 0
inc hl
ld a,(hl)
in a,($09) ; Set zone 1
inc hl
ld a,(hl)
in a,($0A) ; Set zone 2
inc hl
ld a,(hl)
in a,($0B) ; Set zone 3
</pre>

The table at $289C is used to set the 4 zones like an unique $7800-bytes long one in 32KiB increments, meaning that $800 bytes are wasted at the end of each range (mapped to [[Z80 RAM]]).

<pre>
Data at $289C:

1E 0E 06 02 = F000, E000, C000, 8000 "Big bank 0": $8000~ $F7FF ($F800~ $FFFF is wasted)
2E 16 0A 04 = 17000, 16000, 14000, 10000 "Big bank 1": $10000~$177FF ($177FF~$17FFF is wasted)
3E 1E 0E 06 = 1F000, 1E000, 1C000, 18000 "Big bank 2": $18000~$1F7FF ($1F7FF~$1FFFF is wasted)
4E 26 12 08 = 27000, 26000, 24000, 20000 "Big bank 3": $20000~$277FF ($277FF~$27FFF is wasted)
5E 2E 16 0A = 2F000, 2E000, 2C000, 28000 "Big bank 4": $28000~$2F7FF ($2F7FF~$2FFFF is wasted)
6E 36 1A 0C = 37000, 36000, 34000, 30000 "Big bank 5": $30000~$377FF ($377FF~$37FFF is wasted)
7E 3E 1E 0E = 3F000, 3E000, 3C000, 38000 "Big bank 6": $38000~$3F7FF ($3F7FF~$3FFFF is wasted)
</pre>

Note that the game has a 128KiB [[M1 ROM]], but the table is long enough to map up to 256KiB.

==CD systems==

CD systems only have 64KiB of RAM dedicated to the {{Chipname|Z80}}. There's no bankswitching.

It seems that {{Chipname|NEO-SUD}} allows loading [[Z80 file]]s accross the whole range, and locks $0000~$F7FF as read-only to simulate ROM during execution.

=Pinout=

[[File:Z80_pinout.png|640px]]

=Datasheet=

Z8400 datasheet: [[http://www.datasheetcatalog.org/datasheets/restul/285906_DS.pdf]]

[[Category:Chips]]
[[Category:Audio system]]
[[Category:Base system]]

NEO-ZMC

2026-02-23T19:02:48Z

Furrtek: /* Details */

{{ChipInfo
|picture=crt_zmc.jpg
|pkg=SOIC24
|manu=fujitsu
|date=1991 ?
|gates=
|used_on=[[cartridges]]
}}

{{Chipname|Z80}} '''M'''emory '''C'''ontroller. Handles the [[Z80]] bankswitching in cartridges. To save pins, the Z80's upper address line are also used as data input. The chip's write strobe SDRD0 is [[Z80 port map|port]] address decoded inside the system.

=Pinout=

{{Pinout|NEO-ZMC|512}}

Pins 10, 11, 12 may be M1 higher address bits ?

* SDA0, SDA1, SDA8~15: Z80 address bus
* M1 A11~M1 A18: [[M1 ROM]] address lines
* SDRD0: Decoded write signal from {{Chipname|NEO-D0}} (latch on rising edge)

=Operation=

SDA8~SDA15 are used for the bank number (data), SDA0 and SDA1 for selecting the window.

{|class="wikitable"
!SDA1
!SDA0
!Z80 port
!Window
!Address range
!Size
!Latch size
|-
|0||0||$08||0||$F000~$F7FF||2KiB||8 bits
|-
|0||1||$09||1||$E000~$EFFF||4KiB||7 bits
|-
|1||0||$0A||2||$C000~$DFFF||8KiB||6 bits
|-
|1||1||$0B||3||$8000~$BFFF||16KiB||5 bits
|}

==Details==
[[File:Neo-zmz_operation.png|thumb]]

SDRD0 must be high before configuring banks.

To configure a bank to be accessed (e.g. bank 1 in the $8000~$BFFF range):
* Set SDRD0 low (prepare for new bank configuration, outputs are tri-stated)
* Set SDA0~15 = '''$810B''', select 16KiB bank 1 in window 3 (Why $810B and not just $010B ?)
* Set SDRD0 high (latch bank, ready to convert inputs to proper output signals)
* Now, when the Z80 reads the '''$8000~BFFF''' range, NEO-ZMC will map this to the M1 ROM zone '''$04000~$07FFF'''

[[Category:Audio system]]
[[Category:Chips]]

Z80 port map

2026-02-23T18:57:18Z

Furrtek: Decoded signals

Some infos from [[User:kyuusaku]]

The decode mask for '''reading''' ports is always $0C. The one for writes is indicated for each case.

{| class="regdef"
|'''Address'''
|'''Read'''
|'''Write'''
|-
|$00
|
*Read [[68k/Z80_communication|command byte]] that was written by {{Chipname|68k}}
*Acknowledge [[Z80 interrupts|NMI]]
Active signal: {{Sig|SDZ80R|SDZ80R}}
|Clear sound code from 68k to $00
Active signal: {{Sig|SDZ80CLR|SDZ80CLR}}

Decode mask: $0C
|-
|$04~$07
|[[YM2610]] read
Active signal: {{Sig|2610RD|2610RD}}
|[[YM2610]] write
Active signal: {{Sig|2610WR|2610WR}}

Decode mask: $0C
|-
|$08
|Set [[Z80 memory map|$F000~$F7FF]] bank

Active signal: {{Sig|SDRD0|SDRD0}}
|rowspan="4"|Enable NMIs

Decode mask: $1C
|-
|$09
|Set $E000~$EFFF bank

Active signal: {{Sig|SDRD0|SDRD0}}
|-
|$0A
|Set $C000~$DFFF bank

Active signal: {{Sig|SDRD0|SDRD0}}
|-
|$0B
|Set $8000~$BFFF bank

Active signal: {{Sig|SDRD0|SDRD0}}
|-
|$0C
|See {{Sig|SDRD1|SDRD1}}. Never used by any game ?
|Write reply byte to 68k
Active signal: {{Sig|SDZ80W|SDZ80W}}

Decode mask: $0C
|-
|$18
|Same as range $08~$0B
|Disable NMIs

Decode mask: $1C
|}

Note that the [[M1 ROM|Z80 ROM]] [[Z80 bankswitching|bank selection]] is done by '''reading''' ports.

SNK used an obscure feature of the Z80: when accessing ports, the entire address bus is set with the register pair BC, not only the lower 8 bits with register C.

The banks can then be chosen by putting the bank number in register B, the port number ($0 to $B) in register C, and doing IN A,(C), discarding register A.

This is handled by {{Chipname|NEO-ZMC}} in cartridges.

Some [[sound driver]]s use port $C0 (and others ?) in their code. Since only SDA2 and SDA3 are used for port decoding, port $C0 maps to a mirror of port $00. It's believed to be a remnant of some development tool.

[[Category:Base system]]
[[Category:Audio system]]

M1 ROM

2026-02-23T18:47:46Z

Furrtek:

[[File:m_rom.jpg|thumb|right|128KiB M1 ROM]]
"'''M'''usic" ? Single 8-bit ROM containing the [[z80]] program and data in [[cartridges]]. Often bankswitched by {{Chipname|NEO-ZMC}} or {{Chipname|NEO-ZMC2}} if larger than 64KiB.

This ROM does not contain sound samples, these are stored in the [[V ROM]]s.

[[Category:Chips]]
[[Category:Cartridge systems]]

Z80 port map

2026-02-19T18:18:53Z

Furrtek:

Some infos from [[User:kyuusaku]]

The decode mask for '''reading''' ports is always $0C. The one for writes is indicated for each case.

{| class="regdef"
|'''Address'''
|'''Read'''
|'''Write'''
|'''[[Memory_mapped_registers#Address_decode_masks|Decode mask]]'''
|-
|$00
|
*Read sound code from {{Chipname|68k}}
*Acknowledge [[Z80 interrupts|NMI]]
|Clear sound code from 68k to $00
|rowspan="2"|$0C
|-
|$04
|colspan="2"|[[YM2610]] I/O
|-
|$08
|Set [[Z80 memory map|$F000~$F7FF]] bank
|rowspan="4"|Enable NMIs
|rowspan="4"|$1C
|-
|$09
|Set $E000~$EFFF bank
|-
|$0A
|Set $C000~$DFFF bank
|-
|$0B
|Set $8000~$BFFF bank
|-
|$0C
|See {{Sig|SDRD1|SDRD1}}
|[[68k/Z80_communication|Reply]] to 68k
|$0C
|-
|$18
|See address $08
|Disable NMIs
|$1C
|}

Note that the [[M1 ROM|Z80 ROM]] [[Z80 bankswitching|bank selection]] is done by '''reading''' ports.

SNK used an obscure feature of the Z80: when accessing ports, the entire address bus is set with the register pair BC, not only the lower 8 bits with register C.

The banks can then be chosen by putting the bank number in B, the port number in C, and doing IN A,(C), discarding A.

This is handled by {{Chipname|NEO-ZMC}} in cartridges.

Some [[sound driver]]s use port $C0 (and others ?) in their code. Since only SDA2 and SDA3 are used for port decoding, port $C0 maps to a mirror of port $00. It's believed to be a remnant of some development tool.

[[Category:Base system]]
[[Category:Audio system]]

User talk:Amerika

2026-02-19T18:06:48Z

Furrtek: Welcome!

User:Furrtek

2026-02-19T17:58:21Z

Furrtek:

Hello :)

I couldn't have a NeoGeo when I was a kid so I took my revenge.

[[File:ftksnk.jpg]]

Contact: @furrtek on Telegram and Discord, furrtek@gmail.com

Main Page

2026-02-19T17:57:03Z

Furrtek: /* Todo */

__NOTOC__
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[[File:Neo-Geo-AES-Console-Set.png|left|x100px|link=]]
<h2 class="title">The NeoGeo Development Wiki</h2>
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<div id="home-right">
<div class="home-block">
==[[Special:RecentChanges|Recent changes]] (minor edits hidden)==
{{Special:Recentchanges/4,hideminor}}
</div>

<div class="home-block">
==About this wiki==
<ul style="list-style:outside none none;">
<li>The wiki has {{NUMBEROFARTICLES}} pages thanks to our [[Special:Userlist|contributors]]</li>
<li>Hosting provided by [[User:Furrtek|Furrtek]], previously by [[User:ElBarto|ElBarto]] for 15 years !</li>
<li>Don't know where to start ? Try [[How_to_start|here]]</li>
<li>Can't find what you're looking for ? Try our [[links]]</li>
<li>'''Want to help ? Just [[Join_wiki|register]] ''' !</li>
<li>'''How to edit, guidelines, available templates, suggestions: [[The wiki]]'''</li>
</ul>
</div>

<div class="home-block">

==Todo==
* See [[Special:WantedPages|wanted pages]], [[Special:AncientPages|old pages]], [[Special:ShortPages|short pages]], and [[Todo/Mysteries]].
* Make subcategories, move/merge "BIOS calls"
* Better troubleshooting tips
* Make a downloadable offline capture every few months ?

Main Page

2026-02-19T17:56:09Z

Furrtek: Who to complain to, removed IRC channel info

__NOTOC__
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<h2 class="title">The NeoGeo Development Wiki</h2>
<p class="headline">This wiki is about every technical aspects of the SNK NeoGeo hardware and software (AES, MVS, CD and CDZ).<br />Our aim is to provide the most detailed, accurate and up to date information for preservation, homebrew development and repairs.</p>
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<div id="home-right">
<div class="home-block">
==[[Special:RecentChanges|Recent changes]] (minor edits hidden)==
{{Special:Recentchanges/4,hideminor}}
</div>

<div class="home-block">
==About this wiki==
<ul style="list-style:outside none none;">
<li>The wiki has {{NUMBEROFARTICLES}} pages thanks to our [[Special:Userlist|contributors]]</li>
<li>Hosting provided by [[User:Furrtek|Furrtek]], previously by [[User:ElBarto|ElBarto]] for 15 years !</li>
<li>Don't know where to start ? Try [[How_to_start|here]]</li>
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<li>'''Want to help ? Just [[Join_wiki|register]] ''' !</li>
<li>'''How to edit, guidelines, available templates, suggestions: [[The wiki]]'''</li>
</ul>
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<div class="home-block">

==Todo==
* See [[Special:WantedPages|wanted pages]], [[Special:AncientPages|old pages]], [[Special:ShortPages|short pages]], and [[Todo/Mysteries]].
* Publish asm highlighter for ConTEXT
* Make subcategories, move/merge "BIOS calls"
* More schematics, chip details/pinouts
* Troubleshooting tips
* Make a downloadable offline capture every few months ?
</div>

</div>

</div>

68k program header

2026-02-07T23:38:08Z

Furrtek:

ASM ROM header templates.

==For cartridge systems==

{|class="regdef"
|'''Address'''
|'''Size'''
|'''Description'''
|-
|$100
|7 bytes
|"NEO-GEO" string (first cartridge recognition code).
|-
|$107
|byte
|System version (0 for cartridge systems, 1 or 2 for adapted cart games on Neo CD ?).
|-
|$108
|word
|[[NGH number]] in BCD, 0000 prohibited.
|-
|$10A
|longword
|Total [[P ROM]] data size in bytes.
|-
|$10E
|longword
|Pointer to the backup RAM data block in [[68k user RAM]]. The first 2 bytes are usually the [[debug DIPs]]. Doesn't need to be aligned.
|-
|$112
|word
|Size of the backup RAM data block in bytes. Must not exceed 4096.
|-
|$114
|byte
|[[Eyecatcher]] animation flag. 0=Done by system ROM, 1=Done by game, 2=Nothing.
|-
|$115
|byte
|Sprite bank number (upper 8 bits of tile number) for the eye-catcher logo, if done by system ROM.
|-
|$116
|longword
|Pointer to Japanese [[Software_DIPs|software DIPs settings layout]].
|-
|$11A
|longword
|Pointer to US settings software DIPs settings layout.
|-
|$11E
|longword
|Pointer to Euro settings software DIPs settings layout.
|-
|$122
|6 bytes
|JMP to [[USER subroutine]] (code start).
|-
|$128
|6 bytes
|JMP to [[PLAYER_START subroutine]].
|-
|$12E
|6 bytes
|JMP to [[DEMO_END subroutine]].
|-
|$134
|6 bytes
|JMP to [[COIN_SOUND subroutine]].
|-
|$182
|longword
|Pointer to [[security code]] (second cartridge recognition code). Must be word aligned.
|-
|$186
|longword
|Unknown (seems only set to 0x00000000 on boards containing Spanish software DIPs).
|-
|$18A
|longword
|Unknown (seems only set to 0x00000001 on boards containing Spanish software DIPs).
|-
|$18E
|longword
|Pointer to Spanish settings software DIPs settings layout (not all games use this).
|}

===Minimal header (from [[User:Smkdan|Smkdan's]] sources)===

No need for a complete [[68k vector table]].

<syntaxhighlight>
org $0000
dc.l $10F300

org $0004
dc.l $C00402

org $0064
dc.l VBLANK ;IRQ handler

org $0100
dc.b "NEO-GEO",$00

org $0108
dc.w $1234 ;NGH

org $0122
jmp USER ;entry

org $0114
dc.w $0100 ;logo flag, don't show it just go straight to the entry point

org $0182
dc.l Code ;code pointer
Code:
dc.l $76004A6D,$0A146600,$003C206D,$0A043E2D
dc.l $0A0813C0,$00300001,$32100C01,$00FF671A
dc.l $30280002,$B02D0ACE,$66103028,$0004B02D
dc.l $0ACF6606,$B22D0AD0,$67085088,$51CFFFD4
dc.l $36074E75,$206D0A04,$3E2D0A08,$3210E049
dc.l $0C0100FF,$671A3010,$B02D0ACE,$66123028
dc.l $0002E048,$B02D0ACF,$6606B22D,$0AD06708
dc.l $588851CF,$FFD83607
dc.w $4e75
</syntaxhighlight>

===Full header (from some unknown example code)===

<syntaxhighlight>
org $0100
dc.b "NEO-GEO",$00

dc.w $1234 ;NGH
dc.l $00080000 ;P ROM size
dc.l $00100000 ;debug DIPs pointer
dc.w $01 ;size of DIP data
dc.b $00 ;let the BIOS show the logo
dc.b $1B ;first tile of the logo is $1B00
dc.l JPConfig ;Japanese config menu pointer
dc.l USConfig ;US config menu pointer
dc.l EUConfig ;European config menu pointer

jmp USER
jmp PLAYER_START
jmp DEMO_END
jmp COIN_SOUND

org $0182
dc.l Code ;code pointer
Code:
dc.l $76004A6D,$0A146600,$003C206D,$0A043E2D
dc.l $0A0813C0,$00300001,$32100C01,$00FF671A
dc.l $30280002,$B02D0ACE,$66103028,$0004B02D
dc.l $0ACF6606,$B22D0AD0,$67085088,$51CFFFD4
dc.l $36074E75,$206D0A04,$3E2D0A08,$3210E049
dc.l $0C0100FF,$671A3010,$B02D0ACE,$66123028
dc.l $0002E048,$B02D0ACF,$6606B22D,$0AD06708
dc.l $588851CF,$FFD83607
dc.w $4e75

; Configuration menu layouts (soft DIPs)
JPConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "

USConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "

EUConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "
</syntaxhighlight>

==For CD systems==
<syntaxhighlight>
org $100
dc.b "NEO-GEO",$02 ;CDDA flag
dc.w $1234 ;NGH
dc.l $00080000 ;P ROM size
dc.l $00100000 ;debug DIPs pointer
dc.w $01 ;size of DIP data
dc.b $00 ;let the BIOS show the logo
dc.b $1B ;first tile of the logo is $1B00
dc.l JPConfig ;Japanese config menu pointer
dc.l USConfig ;US config menu pointer
dc.l EUConfig ;European config menu pointer

org $122
jmp Start

org $13A
dc.w $0000 ;Z80 RAM address for CDDA commands
</syntaxhighlight>

[[Category:Base system]]
[[Category:Code]]

68k program header

2026-02-07T22:00:19Z

Furrtek: /* For cartridge systems */

ASM ROM header templates.

==For cartridge systems==

{|class="regdef"
|'''Address'''
|'''Size'''
|'''Description'''
|-
|$100
|7 bytes
|"NEO-GEO" string (first cartridge recognition code).
|-
|$107
|byte
|System version (0 for cartridge systems, 1 or 2 for adapted cart games on Neo CD ?).
|-
|$108
|word
|[[NGH number]] in BCD, 0000 prohibited.
|-
|$10A
|longword
|Total [[P ROM]] data size in bytes.
|-
|$10E
|longword
|Pointer to the backup RAM data block in [[68k user RAM]]. The first 2 bytes are usually the [[debug DIPs]].
|-
|$112
|word
|Size of the backup RAM data block.
|-
|$114
|byte
|[[Eyecatcher]] animation flag. 0=Done by system ROM, 1=Done by game, 2=Nothing.
|-
|$115
|byte
|Sprite bank number (upper 8 bits of tile number) for the eye-catcher logo, if done by system ROM.
|-
|$116
|longword
|Pointer to Japanese [[Software_DIPs|software DIPs settings layout]].
|-
|$11A
|longword
|Pointer to US settings software DIPs settings layout.
|-
|$11E
|longword
|Pointer to Euro settings software DIPs settings layout.
|-
|$122
|6 bytes
|JMP to [[USER subroutine]] (code start).
|-
|$128
|6 bytes
|JMP to [[PLAYER_START subroutine]].
|-
|$12E
|6 bytes
|JMP to [[DEMO_END subroutine]].
|-
|$134
|6 bytes
|JMP to [[COIN_SOUND subroutine]].
|-
|$182
|longword
|Pointer to [[security code]] (second cartridge recognition code). Must be word aligned.
|-
|$186
|longword
|Unknown (seems only set to 0x00000000 on boards containing Spanish software DIPs).
|-
|$18A
|longword
|Unknown (seems only set to 0x00000001 on boards containing Spanish software DIPs).
|-
|$18E
|longword
|Pointer to Spanish settings software DIPs settings layout (not all games use this).
|}

===Minimal header (from [[User:Smkdan|Smkdan's]] sources)===

No need for a complete [[68k vector table]].

<syntaxhighlight>
org $0000
dc.l $10F300

org $0004
dc.l $C00402

org $0064
dc.l VBLANK ;IRQ handler

org $0100
dc.b "NEO-GEO",$00

org $0108
dc.w $1234 ;NGH

org $0122
jmp USER ;entry

org $0114
dc.w $0100 ;logo flag, don't show it just go straight to the entry point

org $0182
dc.l Code ;code pointer
Code:
dc.l $76004A6D,$0A146600,$003C206D,$0A043E2D
dc.l $0A0813C0,$00300001,$32100C01,$00FF671A
dc.l $30280002,$B02D0ACE,$66103028,$0004B02D
dc.l $0ACF6606,$B22D0AD0,$67085088,$51CFFFD4
dc.l $36074E75,$206D0A04,$3E2D0A08,$3210E049
dc.l $0C0100FF,$671A3010,$B02D0ACE,$66123028
dc.l $0002E048,$B02D0ACF,$6606B22D,$0AD06708
dc.l $588851CF,$FFD83607
dc.w $4e75
</syntaxhighlight>

===Full header (from some unknown example code)===

<syntaxhighlight>
org $0100
dc.b "NEO-GEO",$00

dc.w $1234 ;NGH
dc.l $00080000 ;P ROM size
dc.l $00100000 ;debug DIPs pointer
dc.w $01 ;size of DIP data
dc.b $00 ;let the BIOS show the logo
dc.b $1B ;first tile of the logo is $1B00
dc.l JPConfig ;Japanese config menu pointer
dc.l USConfig ;US config menu pointer
dc.l EUConfig ;European config menu pointer

jmp USER
jmp PLAYER_START
jmp DEMO_END
jmp COIN_SOUND

org $0182
dc.l Code ;code pointer
Code:
dc.l $76004A6D,$0A146600,$003C206D,$0A043E2D
dc.l $0A0813C0,$00300001,$32100C01,$00FF671A
dc.l $30280002,$B02D0ACE,$66103028,$0004B02D
dc.l $0ACF6606,$B22D0AD0,$67085088,$51CFFFD4
dc.l $36074E75,$206D0A04,$3E2D0A08,$3210E049
dc.l $0C0100FF,$671A3010,$B02D0ACE,$66123028
dc.l $0002E048,$B02D0ACF,$6606B22D,$0AD06708
dc.l $588851CF,$FFD83607
dc.w $4e75

; Configuration menu layouts (soft DIPs)
JPConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "

USConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "

EUConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "
</syntaxhighlight>

==For CD systems==
<syntaxhighlight>
org $100
dc.b "NEO-GEO",$02 ;CDDA flag
dc.w $1234 ;NGH
dc.l $00080000 ;P ROM size
dc.l $00100000 ;debug DIPs pointer
dc.w $01 ;size of DIP data
dc.b $00 ;let the BIOS show the logo
dc.b $1B ;first tile of the logo is $1B00
dc.l JPConfig ;Japanese config menu pointer
dc.l USConfig ;US config menu pointer
dc.l EUConfig ;European config menu pointer

org $122
jmp Start

org $13A
dc.w $0000 ;Z80 RAM address for CDDA commands
</syntaxhighlight>

[[Category:Base system]]
[[Category:Code]]

Software DIPs

2026-02-07T16:47:57Z

Furrtek:

[[File:Softdips.png|thumb|right|A Soft DIPs setup screen.]]

Software DIPs are a list of a maximum of 14 game-specific settings. They can be modified from the MVS [[System ROM]] menu, or with system ROM hacks for other systems.

The settings names and their possible values are stored in the game's [[68k program header]] in a specific format, read by the system ROM to form a menu.

On the [[MVS]], the settings are saved for each game in the [[backup RAM]].

The settings are copied from backup RAM to [[68k user RAM|user RAM]] to '''BIOS_GAME_DIP''' ($10FD84) just before the game is started up. If no settings are found, they're initialized to the default values.

(Does the system ROM check values pulled from the backup RAM against the bounds given by the game ? Can a corrupt backup RAM save make games crash with
out of bounds settings ?)

Software DIPs settings aren't available on the AES, the system ROM always loads the game's default values.

== Config data description ==

Most of the following information by [[User:ElBarto|ElBarto]]:

{| class="regdef" style="text-align:center;"
| '''0x00'''
| 16 bytes
| Game name, no termination char required.
|-
| '''0x10'''
| 6 bytes
| Special settings list, 4 entries. See description below.
|-
| '''0x16'''
| 10 bytes
| Simple settings list, up to 10 entries. See description below.
|-
| '''0x20'''
| x*12 bytes
| String table. Strings are 12 bytes long and padded with 0x20 (space). Max number ?
|}

===Special settings list===

The special settings list holds 4 entries: the first 2 are for time settings, and the last 2 are for count settings.

A time setting occupies one word, which defines the default value:
* The upper byte is the minutes (up to 29 ?, in BCD).
* The lower byte is the seconds (in BCD).

An unused time setting must be set to 0xFFFF.

A count setting occupies one byte, which defines the default value. It can go from 0 to 100 (not in BCD), with 0 displayed as "WITHOUT" and 100 as "INFINITE".
In some versions of the [[system ROM]], "times" is displayed after the value ?

An unused count setting must be set to 0xFF.

All special settings use a single string from the strings table, for the setting's name.

===Simple settings list===

Each options occupies one byte.

The upper 4 bits define the default value (starts from 0) and the lower 4 bits the number of choices.

A few games have a simple setting entry with a number of choices set to zero, just to show a "▼NEXT PAGE" string on the bottom of the MVS menu.

==Examples==

<pre>
dc.b "TEST ROM " ; Game name
dc.w $FFFF ; Special settings list (none used)
dc.w $FFFF
dc.b $FF,$FF
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
; String table:
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

{|
|[[File:Config_1.png]]
|[[File:Config_2.png]]
|}

<pre>
dc.b "TEST ROM " ; Game name
dc.w $4220 ; Special setting 1: 42 minutes 20 seconds
dc.w $2042 ; Special setting 2: 20 minutes 42 seconds
dc.b $42 ; Special setting 3: 66
dc.b $64 ; Special setting 4: 100 ("INFINITE")
dc.b $24 ; Simple setting 1: 4 choices, default is #2
dc.b $02 ; Simple setting 2: 2 choices, default is #0
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b "TIMER 1 " ; Special setting 1's description
dc.b "TIMER 2 " ; Special setting 2's description
dc.b "COUNTER " ; Special setting 3's description
dc.b "COUNTER SPE " ; Special setting 4's description
dc.b "LIVES " ; Simple setting 1's description
dc.b "1 " ; Simple setting 1's choices
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY " ; Simple setting 2's description
dc.b "WITH " ; Simple setting 2's choices
dc.b "WITHOUT "
</pre>

[[File:Config_3.png]]

[[Category:Base system]]

68k program header

2026-02-06T22:33:11Z

Furrtek: /* For cartridge systems */

ASM ROM header templates.

==For cartridge systems==

{|class="regdef"
|'''Address'''
|'''Size'''
|'''Description'''
|-
|$100
|7 bytes
|"NEO-GEO" string (first cartridge recognition code).
|-
|$107
|byte
|System version (0 for cartridge systems, 1 or 2 for adapted cart games on Neo CD ?).
|-
|$108
|word
|[[NGH number]] in BCD, 0000 prohibited.
|-
|$10A
|longword
|Total [[P ROM]] data size in bytes.
|-
|$10E
|longword
|Pointer to backup RAM data block (in [[68k user RAM]]). The first 2 bytes are the [[debug DIPs]].
|-
|$112
|word
|Size of the required game save data in bytes.
|-
|$114
|byte
|[[Eyecatcher]] animation flag. 0=Done by system ROM, 1=Done by game, 2=Nothing.
|-
|$115
|byte
|Sprite bank number (upper 8 bits of tile number) for the eye-catcher logo, if done by system ROM.
|-
|$116
|longword
|Pointer to Japanese [[Software_DIPs|software DIPs settings layout]].
|-
|$11A
|longword
|Pointer to US settings software DIPs settings layout.
|-
|$11E
|longword
|Pointer to Euro settings software DIPs settings layout.
|-
|$122
|6 bytes
|JMP to [[USER subroutine]] (code start).
|-
|$128
|6 bytes
|JMP to [[PLAYER_START subroutine]].
|-
|$12E
|6 bytes
|JMP to [[DEMO_END subroutine]].
|-
|$134
|6 bytes
|JMP to [[COIN_SOUND subroutine]].
|-
|$182
|longword
|Pointer to [[security code]] (second cartridge recognition code). Must be word aligned.
|-
|$186
|longword
|Unknown (seems only set to 0x00000000 on boards containing Spanish software DIPs).
|-
|$18A
|longword
|Unknown (seems only set to 0x00000001 on boards containing Spanish software DIPs).
|-
|$18E
|longword
|Pointer to Spanish settings software DIPs settings layout (not all games use this).
|}

===Minimal header (from [[User:Smkdan|Smkdan's]] sources)===

No need for a complete [[68k vector table]].

<syntaxhighlight>
org $0000
dc.l $10F300

org $0004
dc.l $C00402

org $0064
dc.l VBLANK ;IRQ handler

org $0100
dc.b "NEO-GEO",$00

org $0108
dc.w $1234 ;NGH

org $0122
jmp USER ;entry

org $0114
dc.w $0100 ;logo flag, don't show it just go straight to the entry point

org $0182
dc.l Code ;code pointer
Code:
dc.l $76004A6D,$0A146600,$003C206D,$0A043E2D
dc.l $0A0813C0,$00300001,$32100C01,$00FF671A
dc.l $30280002,$B02D0ACE,$66103028,$0004B02D
dc.l $0ACF6606,$B22D0AD0,$67085088,$51CFFFD4
dc.l $36074E75,$206D0A04,$3E2D0A08,$3210E049
dc.l $0C0100FF,$671A3010,$B02D0ACE,$66123028
dc.l $0002E048,$B02D0ACF,$6606B22D,$0AD06708
dc.l $588851CF,$FFD83607
dc.w $4e75
</syntaxhighlight>

===Full header (from some unknown example code)===

<syntaxhighlight>
org $0100
dc.b "NEO-GEO",$00

dc.w $1234 ;NGH
dc.l $00080000 ;P ROM size
dc.l $00100000 ;debug DIPs pointer
dc.w $01 ;size of DIP data
dc.b $00 ;let the BIOS show the logo
dc.b $1B ;first tile of the logo is $1B00
dc.l JPConfig ;Japanese config menu pointer
dc.l USConfig ;US config menu pointer
dc.l EUConfig ;European config menu pointer

jmp USER
jmp PLAYER_START
jmp DEMO_END
jmp COIN_SOUND

org $0182
dc.l Code ;code pointer
Code:
dc.l $76004A6D,$0A146600,$003C206D,$0A043E2D
dc.l $0A0813C0,$00300001,$32100C01,$00FF671A
dc.l $30280002,$B02D0ACE,$66103028,$0004B02D
dc.l $0ACF6606,$B22D0AD0,$67085088,$51CFFFD4
dc.l $36074E75,$206D0A04,$3E2D0A08,$3210E049
dc.l $0C0100FF,$671A3010,$B02D0ACE,$66123028
dc.l $0002E048,$B02D0ACF,$6606B22D,$0AD06708
dc.l $588851CF,$FFD83607
dc.w $4e75

; Configuration menu layouts (soft DIPs)
JPConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "

USConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "

EUConfig:
dc.b "0123456789ABCDEF" ; Game name
dc.b $FF,$FF,$FF,$FF,$FF,$FF ; Special list
dc.b $24,$02,$00,$00,$00,$00,$00,$00,$00,$00 ; Option list
dc.b "LIVES "
dc.b "1 "
dc.b "2 "
dc.b "3 "
dc.b "4 "
dc.b "HOW TO PLAY "
dc.b "WITH "
dc.b "WITHOUT "
</syntaxhighlight>

==For CD systems==
<syntaxhighlight>
org $100
dc.b "NEO-GEO",$02 ;CDDA flag
dc.w $1234 ;NGH
dc.l $00080000 ;P ROM size
dc.l $00100000 ;debug DIPs pointer
dc.w $01 ;size of DIP data
dc.b $00 ;let the BIOS show the logo
dc.b $1B ;first tile of the logo is $1B00
dc.l JPConfig ;Japanese config menu pointer
dc.l USConfig ;US config menu pointer
dc.l EUConfig ;European config menu pointer

org $122
jmp Start

org $13A
dc.w $0000 ;Z80 RAM address for CDDA commands
</syntaxhighlight>

[[Category:Base system]]
[[Category:Code]]

BIOS calls

2026-02-06T22:10:10Z

Furrtek: /* Jump tables */

Please see [[68k ASM defines]] or [[C Defines]] for the hex addresses.

= Jump tables =

{| class="regdef" style="text-align:center;"
|'''Call address'''
|'''[[NEO-EP0]] AES BIOS'''
|'''"SP-E" MVS BIOS'''
|'''"TOP-SP1-1" CDM3-2 BIOS''' & '''"FRONT-SP1" BIOS'''
|'''"NEOCD.BIN" CDZ BIOS'''
|-
|$C00402 to $C00432
|colspan="4"|Entry point (system boots here)
|-
|$C00438
|colspan="4"|[[SYSTEM_INT1]]
|-
|$C0043E
|colspan="2"|[[SYSTEM_INT2]]
|colspan="2"|RTS
|-
|$C00444
|colspan="4"|[[SYSTEM_RETURN]]
|-
|$C0044A
|colspan="4"|[[SYSTEM_IO]]
|-
|$C00450
|colspan="4"|[[CREDIT_CHECK]]
|-
|$C00456
|colspan="4"|[[CREDIT_DOWN]]
|-
|$C0045C
|RTS
|[[READ_CALENDAR]]
|colspan="2"|RTS
|-
|$C00462
|RTS
|[[SETUP_CALENDAR]]
|colspan="2"|RTS
|-
|$C00468
|colspan="4"|[[CARD]]
|-
|$C0046E
|colspan="4"|[[CARD_ERROR]]
|-
|$C00474
|colspan="2"|[[HOW_TO_PLAY]]
|colspan="2"|RTS
|-
|$C0047A
|colspan="2"|Calc a checksum and loop forever
|colspan="2"|RTS
|-
|$C00480 to $C004BC
|colspan="4"|RTS
|-
|$C004C2
|colspan="4"|[[FIX_CLEAR]]
|-
|$C004C8
|colspan="4"|[[LSP_1st]]
|-
|$C004CE
|colspan="4"|[[MESS_OUT]]
|-
|$C004D4
|colspan="4"|[[CONTROLLER_SETUP]]
|-
|$C004DA
|colspan="2"|RTS
|colspan="2"|HBlank handler
|-
|$C004E0 to $C004F2
|colspan="2"|Invalid
|colspan="2"|$FF0000 range register operations and RTEs
|-
|$C004F8 to $C0051C
|colspan="2"|Invalid
|colspan="2"|RTS
|-
|$C00522 to $C00540
|colspan="2"|Invalid
|colspan="2"|?
|-
|$C00546
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_UPLOAD]]
|-
|$C0054C
|colspan="2"|Invalid
|colspan="2"|?
|-
|$C00552
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_LOADFILE]]
|-
|$C00558
|colspan="2"|Invalid
|colspan="2"|?
|-
|$C0055E
|colspan="2"|Invalid
|colspan="2"|BIOSF_CDPLAYER
|-
|$C00564
|colspan="2"|Invalid
|colspan="2"|BIOSF_LOADFILEX (?)
|-
|$C0056A
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_CDDACMD]]
|-
|$C00570
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_VIDEOEN]]
|-
|$C00576
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_PUSHCDOP]]
|-
|$C0057C
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_SETCDDMODE]]
|-
|$C00582
|colspan="2"|Invalid
|colspan="2"|[[BIOSF_RESETGAME]]
|-
|$C00588 to $C00594
|colspan="2"|Invalid
|RTS
|?
|-
|$C0059A to $C006FC
|colspan="2"|Invalid
|colspan="2"|RTS
|}

= Generic BIOS calls =
BIOS calls common to every system.

*[[FIX_CLEAR]]: Clear fix layer
*[[LSP_1st]]: Clear sprites
*[[SYSTEM_INT1]]: Multiple purpose VBL routine
*[[CARD]]: Perform memory card operation

= MVS only BIOS calls =
* [[READ_CALENDAR]]: Read the current calendar values and update the relevant BIOS RAM locations
* [[SETUP_CALENDAR]]: Set the calendar values to the data from the relevant BIOS RAM locations

= CD only BIOS calls =

*[[BIOSF_VIDEOEN]]: Enable/disable video layers
*[[BIOSF_UPLOAD]]: Upload data to [[DRAM]]
*[[BIOSF_LOADFILE]]: Load file from CD (with animation)
*BIOSF_CDPLAYER ($C0055E): Reset to CD player
*BIOSF_LOADFILEX (?) ($C00564): Load file from CD (no animation)
*[[BIOSF_CDDACMD]]: Issue CDDA command

= CDZ only BIOS calls =

Check track 0 ? [[Copy protection]]

[[Category:BIOS calls]]

Replacement chip

2026-01-25T20:21:07Z

Furrtek: Updated options, reasoning, done/todo

Notes about modern SNK chips replacements. Some info can be generalized to replacement of digital custom chips in general.

Reading various [[http://newlifegames.com/nlg/index.php?topic=1859.0 repair logs]], it appears that dead or partially faulty SNK chips are a common issue. Original replacements aren't available outside of some limited new-old-stock occasionally found on Aliexpress and eBay, which might exhibit the same problems if faults are a material or environmental issue. Another common solution is to pull chips from donor boards which are deemed unfixable. Both rely on available stocks that obviously aren't replenished anymore.

For preservation, it can be desirable to produce drop-in replacement chips that are reliable, faithful to the originals, and economically sensible.

=Considered solutions=

Nobody likes rewiring to accomodate different pinouts, especially 80+ pins chips. Producing new ASICs is out of the question because of the price at low quantities, and because many packages used back in the day aren't available anymore.

* Dedicated ASICs ? No: not worth it for such low quantities, development and production of bare dies in the $30-40k range. Doesn't solve the packaging problem.
* Shuttle service ASICs ? Possible but development still quite expensive if several iterations needed. Doesn't solve the packaging problem.
* Reconstruct the chip's logic with regular logic chips ? Possible if logic is very simple and footprint large enough. TSSOP and QFN parts.
* Use 2 boards on top of each other with a mezzanine connector ? Possible but more expensive and fragile.
* Use a CPLD ? Possible if logic simple enough and no RAM blocks needed. Microchip ATF series, Lattice LC4000ZE, and Greenpaks are 5V-tolerant, still made and affordable. Altera MAX3000 and Xilinx XC9500 are phased out but stock is still available.
* Use a FPGA ? No 5V-tolerant parts available anymore, requires voltage shifting (space issue). Flash-based parts like Gowin GW1N, Lattice iCE40 and Altera MAX10 are of interest.

The only solution would be adapter boards the size of the original chips, with castellated holes for surface mounting ?

=List=

*[[NEO-257]]: QFP64R, 5 standard logic chips, done
*[[NEO-273]]: QFP64R, 5 standard logic chips, done
*[[NEO-BUF]]: QFP48, 2 standard logic chips, done
*[[PRO-C0]]: Possible but doesn't seem to fail often and only used on 1st gen systems and games, see ZMC2
*[[NEO-C1]]: QFP100R, fits in 128LEs, all options too big to fit in footprint, flex adapter being attempted
*[[NEO-D0]]: QFP64R, CPLD, done
*[[NEO-E0]]: QFP64R, not enough IOs on QFP100 CPLD, standard logic chips and Greenpaks, done
*[[NEO-F0]]: QFP64R, possible with CPLD ?
*[[NEO-G0]]: QFP64R, 5 standard logic chips, done
*[[NEO-I0]]: QFP64R, possible with CPLD ?
*[[NEO-ZMC]]: Very small, can be found on AliExpress (January 2026). Possible with Greenpak ?
*[[NEO-ZMC2]]: QFP80R, CPLD, done
*[[PCM]]: QFP80R, CPLD, done
*[[NEO-DCR-T]], [[NEO-SDR-T]]: QFP100R, same problem as for NEO-C1.
*Line buffers ([[PRO-B0]], [[NEO-B1]]) could be replaced with MAX10's and level shifting ?. Probably not worth it.

Most other custom chips are too complex to be worth replacing. LSPC requires FPGA, level shifters, very fine pitch adapter, ...

=Logic definitions=

See https://github.com/neogeodev/SNKVerilog

[[Category:Repairs]]
[[Category:Chips]]

The wiki

2025-09-28T18:45:21Z

Furrtek:

=Main rule=

Knowledge isn't an excuse for being a dick. Keep your ego at the door, please :)

=Content directives=

* No AI generated content. Not knowing is fine, pretending to know isn't. If you "don't care", we won't either.
* No stolen content without the original author's approval, except if they explicitly stated as OK to do so.
* No blatant advertising for commercial products.
* No personal infos, except names of key people who already are publicly known.
* No non-technical infos about games (price, story, characters, gameplay, ...). Other websites exist for that.
* By posting information here, you know that it's going in the wild. If you want credit, you can sign (important) information, but don't expect people to care about it.

==Editing guidelines==

*To avoid creating duplicate pages, page names shouldn't contain upper case letters, except for the first one and for acronyms. Intra-wiki links are case sensitive.
*Try to keep page names singular.
*To avoid broken links to external files, please make a local copy by uploading them here (be sure you have the right to).
*If a picture has to be updated with major corrections (like a chip pinout for example), try to delete the wrong version to prevent search engines linking to wrong information.
*Don't hesitate to sign the information you add if you think you discovered something or to specify the source if not.
*It's perfectly okay to make 2-characters edit to correct English mistakes for example, as long as those edits are marked as "minor".
*Links to other pages should ideally be made only once in a page (where it's the most visible or relevant).
*Category tags should be placed at the bottom of the pages sources.

=How to edit=

See https://www.mediawiki.org/wiki/Help:Reference_card

For those who are unfamiliar with wiki editing and don't want to go through lengthy tutorials, here's a short summary of the basics:

*Pages can be created, edited or deleted by any registered user. All operations are logged and can be reverted ("view history" tab).
*Each edit is signed by your username and a timestamp.
*Links to existing pages are in blue, links to needed pages are in red.
*When editing, clicking on the "Show preview" button won't log anything, "Save page" will.
*Marking an edit as "minor" allows to find important changes in logs and correct typos without having the update appear on the front page.
*As stated in all edit pages: the content you submit will be placed under the [http://www.gnu.org/licenses/fdl-1.3.en.html GNU FDL]. This is not the best place to keep things secret.

Mediawiki uses a special markup language for formatting:
*Links to other pages look like this: <nowiki>[[Page name]]</nowiki>
*They can be renamed like this: <nowiki>[[Page name|Link text]]</nowiki>
*Links to categories look like this: <nowiki>[[:Category:Category name]]</nowiki> and can also be renamed with a |.
*Links to other sites look like this: <nowiki>[[http://www.com This is an external link]]</nowiki>
*Pictures can be inserted like this: <nowiki>[[File:image.jpg|thumb|This is a thumbnail and will be placed on the right]]</nowiki>
*Or simply like this, to display them in full size: <nowiki>[[File:image.jpg]]</nowiki>
*'''Bold''' looks like <nowiki>'''this'''</nowiki>, ''Italic'' looks like <nowiki>''this''</nowiki> (those are apostrophes)
*Headlines are made by using = characters: =Title= is the biggest, ====Title==== is the smallest
*Table of contents are automatically generated for pages containing multiple headlines
*Categorizing a page is done by adding tags like this: <nowiki>[[Category:Category_name]]</nowiki>, a page can belong in multiple categories.
*Tables are made using characters: {| starts a table, | starts a new cell, |- starts a new line, |} ends a table. Each of those characters need to be at the start of a new line.
*CSS and HTML markup can also be used most of the time.

*To create a page, just type its URL or make a link to it and click "create". There can't be 404 errors here, any link to pages or files which don't exist give a "create" page.
*Member pages can be created and edited only by the associated member. These can hold informations about yourself, your current projects...

=Templates=

==CSS==

Common.css can be found here: [https://wiki.neogeodev.org/index.php?title=MediaWiki:Common.css].

==Binary register definitions==

[[Template:16BitRegister]] and [[Template:8BitRegister]] can be used to display such tables:
{{16BitRegister|High byte|8|Lower byte|8}}

The code for this one is: <pre><nowiki>{{16BitRegister|High byte|8|Lower byte|8}}</nowiki></pre>

Arguments go by pairs: starting from 0, even ones are the text definition, odd ones are the size of it (in bits). The total size must be equal to the register's length or else the table will be broken and browsers might be unhappy.

==Link templates==

===Register===
[[Template:Reg]]. Parameters: register name (not the address).

===Signal===
[[Template:Sig]]. Parameters: signal name, anchor name in [[signal names]] page, signal polarity ("N", "P", or nothing).

===RAM location===
[[Template:BR]]. Parameters: location name (not the address).

===Chip===
[[Template:Chipname]]. Parameters: chip name/reference.

===PCB===
[[Template:PCB]]. Parameters: board reference.

=Chip pinout templates=

The OpenOffice Draw format was previously used but a move to plain SVG is being made. See the [[https://github.com/neogeodev/SVGPinout SVGPinout NeoGeoDev repo]] to learn how to edit and generate pinouts easily.

Color proposals for buses and pin types (feel free to discuss):
*<span style="background-color:green;color:white;">Green: cartridge slot connections or graphics data</span>
*<span style="background-color:yellow;">Yellow: address buses</span>
*<span style="background-color:blue;color:white;">Blue: data buses</span>
*<span style="background-color:lightgrey;">Grey: ground</span>
*<span style="background-color:red;color:white;">Red: power</span>
*<span style="background-color:purple;color:white;">Purple: control lines</span>
*<span style="background-color:magenta;color:white;">Magenta: clocks</span>
*<span style="background-color:white;color:black;">White: NC (dotted), unknown, others...</span>

The wiki

2025-09-28T09:40:10Z

Furrtek:

=Main rule=

Knowledge isn't an excuse for being a dick. Keep your ego at the door, please :)

=Content directives=

* No AI generated content. Not knowing is fine, pretending to know isn't. If you "don't care", we won't either.
* No stolen content without the original author's approval, except if they explicitly stated as OK to do so.
* No blatant advertising for commercial products.
* No personal infos, except names of key people who already are publicly known.
* No non-technical infos about games (price, story, characters, gameplay, ...). Other websites exist for that.
* By posting information here, you know that it's going in the wild. If you want credit, you can sign (important) information, but don't expect people to care about it.

==Editing guidelines==

*To avoid creating duplicate pages, page names shouldn't contain upper case letters, except for the first one and for acronyms. Intra-wiki links are case sensitive.
*Try to keep page names singular.
*To avoid broken links to external files, please make a local copy by uploading them here (be sure you have the right to).
*If a picture has to be updated with major corrections (like a chip pinout for example), try to delete the wrong version to prevent search engines linking to wrong information.
*Don't hesitate to sign the information you add if you think you discovered something or to specify the source if not.
*It's perfectly okay to make 2-characters edit to correct English mistakes for example, as long as those edits are marked as "minor".
*Links to other pages should ideally be made only once in a page (where it's the most visible or relevant).
*Category tags should be placed at the bottom of the pages sources.

=How to edit=

See https://meta.wikimedia.org/wiki/Help:Reference_card

For those who are unfamiliar with wiki editing and don't want to go through lengthy tutorials, here's a short summary of the basics:

*Pages can be created, edited or deleted by any registered user. All operations are logged and can be reverted ("view history" tab).
*Each edit is signed by your username and a timestamp.
*Links to existing pages are in blue, links to needed pages are in red.
*When editing, clicking on the "Show preview" button won't log anything, "Save page" will.
*Marking an edit as "minor" allows to find important changes in logs and correct typos without having the update appear on the front page.
*As stated in all edit pages: the content you submit will be placed under the [http://www.gnu.org/licenses/fdl-1.3.en.html GNU FDL]. This is not the best place to keep things secret.

Mediawiki uses a special markup language for formatting:
*Links to other pages look like this: <nowiki>[[Page name]]</nowiki>
*They can be renamed like this: <nowiki>[[Page name|Link text]]</nowiki>
*Links to categories look like this: <nowiki>[[:Category:Category name]]</nowiki> and can also be renamed with a |.
*Links to other sites look like this: <nowiki>[[http://www.com This is an external link]]</nowiki>
*Pictures can be inserted like this: <nowiki>[[File:image.jpg|thumb|This is a thumbnail and will be placed on the right]]</nowiki>
*Or simply like this, to display them in full size: <nowiki>[[File:image.jpg]]</nowiki>
*'''Bold''' looks like <nowiki>'''this'''</nowiki>, ''Italic'' looks like <nowiki>''this''</nowiki> (those are apostrophes)
*Headlines are made by using = characters: =Title= is the biggest, ====Title==== is the smallest
*Table of contents are automatically generated for pages containing multiple headlines
*Categorizing a page is done by adding tags like this: <nowiki>[[Category:Category_name]]</nowiki>, a page can belong in multiple categories.
*Tables are made using characters: {| starts a table, | starts a new cell, |- starts a new line, |} ends a table. Each of those characters need to be at the start of a new line.
*CSS and HTML markup can also be used most of the time.

*To create a page, just type its URL or make a link to it and click "create". There can't be 404 errors here, any link to pages or files which don't exist give a "create" page.
*Member pages can be created and edited only by the associated member. These can hold informations about yourself, your current projects...

=Templates=

==CSS==

Common.css can be found here: [https://wiki.neogeodev.org/index.php?title=MediaWiki:Common.css].

==Binary register definitions==

[[Template:16BitRegister]] and [[Template:8BitRegister]] can be used to display such tables:
{{16BitRegister|High byte|8|Lower byte|8}}

The code for this one is: <pre><nowiki>{{16BitRegister|High byte|8|Lower byte|8}}</nowiki></pre>

Arguments go by pairs: starting from 0, even ones are the text definition, odd ones are the size of it (in bits). The total size must be equal to the register's length or else the table will be broken and browsers might be unhappy.

==Link templates==

===Register===
[[Template:Reg]]. Parameters: register name (not the address).

===Signal===
[[Template:Sig]]. Parameters: signal name, anchor name in [[signal names]] page, signal polarity ("N", "P", or nothing).

===RAM location===
[[Template:BR]]. Parameters: location name (not the address).

===Chip===
[[Template:Chipname]]. Parameters: chip name/reference.

===PCB===
[[Template:PCB]]. Parameters: board reference.

=Chip pinout templates=

The OpenOffice Draw format was previously used but a move to plain SVG is being made. See the [[https://github.com/neogeodev/SVGPinout SVGPinout NeoGeoDev repo]] to learn how to edit and generate pinouts easily.

Color proposals for buses and pin types (feel free to discuss):
*<span style="background-color:green;color:white;">Green: cartridge slot connections or graphics data</span>
*<span style="background-color:yellow;">Yellow: address buses</span>
*<span style="background-color:blue;color:white;">Blue: data buses</span>
*<span style="background-color:lightgrey;">Grey: ground</span>
*<span style="background-color:red;color:white;">Red: power</span>
*<span style="background-color:purple;color:white;">Purple: control lines</span>
*<span style="background-color:magenta;color:white;">Magenta: clocks</span>
*<span style="background-color:white;color:black;">White: NC (dotted), unknown, others...</span>