https://wiki.neogeodev.org//api.php?action=feedcontributions&feedformat=atom&user=NFG 2026-05-22T00:46:16Z User contributions MediaWiki 1.40.0 https://wiki.neogeodev.org//index.php?title=Schematics&diff=8298 2023-09-24T23:58:45Z

<p>NFG: /* AES (home) */ Added re-draw of page 5 schematic, preserved link to original scan</p> <hr /> <div>=AES (home)=<br /> <br /> Big thanks to Wolfsoft and ArcadeTV for the scans.<br /> <br /> <br /> On page 6: There are two resistors in the bottom left corner that can't be seen due the page fold.<br /> <br /> The R48 4.7k is connected to VCC and R49 4.7k is connected to GND.<br /> <br /> Both resistors are connected to pin3 of U31A.<br /> <br /> <br /> &lt;gallery widths=300px heights=190px perrow=3&gt;<br /> File:Neogeo_aes_schematics_pal_2-page-001.jpg|'''Page 1''':{{Chipname|68k}} [[68k user RAM]] {{Chipname|NEO-C1}}<br /> File:Neogeo_aes_schematics_pal_2-page-002.jpg|'''Page 2''':{{Chipname|NEO-G0}} [[Palette RAM]] [[Video DAC]]<br /> File:Neogeo_aes_schematics_pal_2-page-003.jpg|'''Page 3''':{{Chipname|NEO-B1}} [[Reset generator]] [[Joypad]] ports<br /> File:Neogeo_aes_schematics_pal_2-page-004.jpg|'''Page 4''':{{Chipname|LSPC2-A2}} [[L0 ROM]] [[VRAM]]<br /> File:NeoGeo Z80-RAM-NEO-DO.png|'''Page 5''':{{Chipname|Z80}} [[Z80 RAM]] {{Chipname|NEO-D0}} [[:File:Neogeo aes schematics pal 2-page-005.jpg|(original scan)]]<br /> File:Neogeo_aes_schematics_pal_2-page-006.jpg|'''Page 6''':{{Chipname|YM2610}} {{Chipname|YM3016}} {{Chipname|NEO-C1}}<br /> File:Neogeo_aes_schematics_pal_2-page-007.jpg|'''Page 7''':[[Video encoder]]<br /> File:Neogeo_aes_schematics_pal_2-page-008.jpg|'''Page 8''':[[Pinouts|cartridge slot]]<br /> File:Neogeo_aes_schematics_pal_2-page-009.jpg|'''Page 9''':[[Memory mapped registers|System latch]] {{Chipname|NEO-E0}} [[Power supply]]<br /> File:Neogeo_aes_schematics_pal_2-page-010.jpg|'''Page 10''':[[Memory card]]<br /> File:Neogeo_aes_schematics_pal_2-page-011.jpg|'''Page 11''':[[Video PLL]]<br /> &lt;/gallery&gt;<br /> <br /> =MVS (MV1F)=<br /> <br /> &lt;span style=&quot;color:#FF0000&quot;&gt;&lt;B&gt;Beware !&lt;/B&gt; There's an error on page 9 (cartridge edge connections): &lt;b&gt;ROMOE/4MB are swapped&lt;/B&gt;. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.&lt;/span&gt;<br /> <br /> &lt;gallery widths=300px heights=190px perrow=3&gt;<br /> File:mv1fs-page1.jpg|'''Page 1''':{{Chipname|68k}} [[System ROM]] [[68k user RAM]] [[Battery-backed RAM]] {{Chipname|NEO-C1}} [[Joypad]] ports {{Chipname|UPD4990}} [[Battery circuit]]<br /> File:mv1fs-page2.jpg|'''Page 2''':{{Chipname|LSPC2-A2}} [[VRAM]] {{Chipname|NEO-I0}} {{Chipname|NEO-B1}} {{Chipname|NEO-ZMC2}} [[SFIX ROM]] [[L0 ROM]]<br /> File:mv1fs-page3.jpg|'''Page 3''':{{Chipname|NEO-E0}} [[Memory mapped registers|System latch]] [[Palette RAM]] [[Video DAC]]<br /> File:mv1fs-page4.jpg|'''Page 4''':{{Chipname|Z80}} [[Z80 RAM]] [[SM1]] ROM {{Chipname|NEO-D0}} {{Chipname|YM2610}} {{Chipname|YM3016}} [[Headphone amp]]<br /> File:mv1fs-page5.jpg|'''Page 5''':[[Power amp]] {{Chipname|NEO-F0}} [[DIPs|DIP switches]] [[Cab interface]]<br /> File:mv1fs-page6.jpg|'''Page 6''':Daughterboard connections<br /> File:mv1fs-page7.jpg|'''Page 7'''<br /> File:mv1fs-page8.jpg|'''Page 8''':Daughterboard connections<br /> File:mv1fs-page9.jpg|'''Page 9''':Cartridge connections<br /> &lt;/gallery&gt;<br /> <br /> =Peripheral (home/arcade)=<br /> &lt;gallery widths=300px heights=190px perrow=3&gt;<br /> File:Neo Geo Steering Wheel Schematic.jpg|Steering wheel schematic for Thrash Rally.<br /> &lt;/gallery&gt;<br /> <br /> <br /> [[Category:Cartridge systems]]<br /> [[Category:Chips]]<br /> <br /> __NOTOC__</div>

NFG https://wiki.neogeodev.org//index.php?title=File:NeoGeo_Z80-RAM-NEO-DO.png&diff=8297 2023-09-24T23:49:13Z

<p>NFG: Re-draw of the NEO-D0 (page 5) schematic.</p> <hr /> <div>== Summary ==<br /> Re-draw of the NEO-D0 (page 5) schematic.<br /> == Licensing ==<br /> {{cc-zero}}</div>

NFG