68k: Difference between revisions

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m (The TOSHIBA TMP68HC000N-12 CHIP which is used is in the SDIP package)
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[[File:aes_68k.jpg|right|thumb|68000 CPU made by Toshiba in DIP package, as found on AES boards.]]
[[File:aes_68k.jpg|right|thumb|68000 CPU made by Toshiba in SDIP package, as found on AES and some MVS boards.]]


The 68k (AKA 68000, MC68000, 68HC000) is a 16bit big-endian CPU designed by Motorola, found in all NeoGeo systems as the main processor. It runs at [[clock|12MHz]].
The 68k (AKA 68000, MC68000, 68HC000) is a 16bit big-endian CPU designed by Motorola, found in all NeoGeo systems as the main processor. It runs at [[clock|12MHz]].


See [[overclocking]].
=Features=
* 8, 32-bit data registers and 8, 32-bit address registers
* 8, 32-bit data registers and 8, 32-bit address registers
* 7 interrupt levels
* 7 interrupt levels
Line 11: Line 8:
* 14 addressing modes
* 14 addressing modes


See [[overclocking]].
=Pinouts=
==SDIP==
[[File:68000DIP.png]]
[[File:68000DIP.odg]]
==PLCC==
[[File:cd1_68k.jpg|right|thumb|The PLCC version.]]
[[File:cd1_68k.jpg|right|thumb|The PLCC version.]]


==Related pages==
[[File:68000PLCC.png]]
See [[68k memory map]], [[68k interrupts]], [[wait state]], and [[Links#68k programming|programming references]].
 
[[File:68000PLCC.odg]]
 
=Related pages=
See [[68k memory map]], [[68k interrupts]], [[wait cycle]], and [[Links#68k programming|programming references]].


==Datasheet==
=Datasheet=


[[http://www.datasheetcatalog.org/datasheet/motorola/MC68HC000.pdf Official datasheet]]
[[http://www.datasheetcatalog.org/datasheet/motorola/MC68HC000.pdf Original datasheet]]


[[Category:Chips]]
[[Category:Chips]]
[[Category:Base system]]
[[Category:Base system]]

Revision as of 22:12, 14 September 2020

68000 CPU made by Toshiba in SDIP package, as found on AES and some MVS boards.

The 68k (AKA 68000, MC68000, 68HC000) is a 16bit big-endian CPU designed by Motorola, found in all NeoGeo systems as the main processor. It runs at 12MHz.

  • 8, 32-bit data registers and 8, 32-bit address registers
  • 7 interrupt levels
  • 56 instructions
  • 14 addressing modes

See overclocking.

Pinouts

SDIP

File:68000DIP.odg

PLCC

File:Cd1 68k.jpg
The PLCC version.

File:68000PLCC.odg

Related pages

See 68k memory map, 68k interrupts, wait cycle, and programming references.

Datasheet

[Original datasheet]