68k interrupts: Difference between revisions
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Interrupts need to be acknowledged by writing to register $3C000C (REG_IRQACK). | Interrupts need to be acknowledged by writing to register $3C000C (REG_IRQACK). | ||
*bit2: Ack VBlank | *bit2: Ack VBlank interrupt | ||
*bit1: Ack | *bit1: Ack Timer interrupt | ||
*bit0: Ack level 3 | *bit0: Ack level 3 | ||
<pre> | <pre> | ||
move #$0007,REG_IRQACK ; | move #$0007,REG_IRQACK ; Acknowledge all interrupts | ||
</pre> | </pre> | ||
Bits 8~10 of the SR register are used to mask | Bits 8~10 of the SR register are used to mask them. | ||
== Vertical Blank | <pre> | ||
move #$2000,SR ; Enable all interrupts (+Supervisor mode) | |||
move #$2700,SR ; Disable all interrupts (+Supervisor mode) | |||
</pre> | |||
== Vertical Blank interrupt == | |||
VBlank interrupt is almost always used. It occurs everytime a new frame is traced (~60Hz). | The VBlank interrupt is almost always used. It occurs everytime a new frame is traced (~60Hz). See [[display timing]]. | ||
== | == Timer interrupt == | ||
The | The Timer interrupt's behavior can be programmed through the [[GPU]]'s [[memory mapped registers]]. It is made of an up-counting 32bit counter clocked by the 6MHz pixel clock, and a match register. It can be used to generate interrupts at intervals ranging from 166.7µs to 11.9 minutes (?). The Sammy logo at the start of [[Viewpoint]] is an example of its use. [[Sengoku 3]] and [[Neo Turf Masters]] are also known to rely on them to do [[scanline effects]]. | ||
== AES/MVS interrupts == | == AES/MVS interrupts levels == | ||
*VBlank: 0 | *VBlank: Level 0 | ||
* | *Timer: Level 1 | ||
*Pending at startup ?: 2 | *Pending at startup ?: Level 2 | ||
== CD interrupts == | == CD interrupts levels == | ||
*VBlank: 1 | *VBlank: Level 1 | ||
* | *Timer: Level 0 | ||
[[Category:Base system]] | [[Category:Base system]] | ||
[[Category:Code]] | [[Category:Code]] | ||
Revision as of 11:49, 27 June 2011
There are 3 interrupt levels on the AES and MVS. Only 2 on the CD hardware.
Interrupts need to be acknowledged by writing to register $3C000C (REG_IRQACK).
- bit2: Ack VBlank interrupt
- bit1: Ack Timer interrupt
- bit0: Ack level 3
move #$0007,REG_IRQACK ; Acknowledge all interrupts
Bits 8~10 of the SR register are used to mask them.
move #$2000,SR ; Enable all interrupts (+Supervisor mode) move #$2700,SR ; Disable all interrupts (+Supervisor mode)
Vertical Blank interrupt
The VBlank interrupt is almost always used. It occurs everytime a new frame is traced (~60Hz). See display timing.
Timer interrupt
The Timer interrupt's behavior can be programmed through the GPU's memory mapped registers. It is made of an up-counting 32bit counter clocked by the 6MHz pixel clock, and a match register. It can be used to generate interrupts at intervals ranging from 166.7µs to 11.9 minutes (?). The Sammy logo at the start of Viewpoint is an example of its use. Sengoku 3 and Neo Turf Masters are also known to rely on them to do scanline effects.
AES/MVS interrupts levels
- VBlank: Level 0
- Timer: Level 1
- Pending at startup ?: Level 2
CD interrupts levels
- VBlank: Level 1
- Timer: Level 0