Difference between revisions of "Bankswitching"

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Games which need more than 1MiB of [[P ROM]] use simple bankswitching of the "P2" ROM, which is achieved in hardware by D-latches on the [[PROG board]]. The P1 ROM is always (?) fixed (in $000000~$1FFFFF ?).
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Games which need more than 2MiB of [[P ROM]] data use simple bankswitching in the [[68k memory map|PORT memory range]] ($200000~$2FFFFF), which is achieved in hardware by latches on the cartridge's [[PROG board]]. No games use bankswitching of the ROM range ($000000~$1FFFFF) ?
  
To switch the ROM data in the $200000~$2FFFFF range, a byte needs to be written in this range. Depending on how many D-latches are connected to the 68k data bus, one or more bits can be used to switch banks.
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To switch the ROM bank, a byte needs to be written in this range. Depending on how large the ROM is, one or more bits can be used.
  
 
[[File:Pbankswitch.png|thumb|300px]]
 
[[File:Pbankswitch.png|thumb|300px]]
  
For example, the PROGBK1 board uses a 74LS74 dual D-latch to allow a 4MiB P2 ROM to be mapped with 4, 1MiB banks (2 bits, see schematic).
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For example, the PROGBK1 board uses a 74LS74 dual D-latch to allow a 4MiB P2 ROM to be mapped in 4, 1MiB banks (2 bits, see schematic).
  
In this case, when a byte write is made in the $200000~$2FFFFF range, PORTWEL drops, latching D0 and D1 to the P2's A20 and A21 lines respectively.
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In this case, when a byte write is done in the $200000~$2FFFFF range, /PORTWEL falls, latching D0 and D1 which are connected to the P2 ROM's A20 and A21 lines respectively.
When the NeoGeo is reset, both latches are set to 0, to ensure that the first bank is mapped on startup.
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When the NeoGeo is reset, both latches are reset to 0, to ensure that the first bank is mapped on startup.
  
(Why is there a pullup on RESET ?)
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As there is no /PORTOE signal on the cartridge edge (like /ROMOE), both /PORTOEL and /PORTOEU need to be ANDed together to make the /OE signal of P2 (if it's a 16bit ROM).
 
 
As there is no /PORTOE signal on the cartridge edge like /ROMOE, both /PORTOEL and /PORTOEU needs to be ANDed together to make the /OE signal of P2 (if it's a 16bit ROM).
 
  
 
===Example code===
 
===Example code===
  
 
<pre>
 
<pre>
move.b #3,#$200000    ;Puts P2's $300000~$3FFFFF in $200000~$2FFFFF
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move.b #3,#$200000    ; Set bank 3, ROM's $300000~$3FFFFF appears in $200000~$2FFFFF
move.b #1,#$2B92F1    ;Puts P2's $100000~$1FFFFF in $200000~$2FFFFF
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move.b #1,#$2B92F1    ; Set bank 1, ROM's $100000~$1FFFFF appears in $200000~$2FFFFF
 
</pre>
 
</pre>
  
 
[[Category:Cartridge systems]]
 
[[Category:Cartridge systems]]
 
[[Category:Chips]]
 
[[Category:Chips]]

Latest revision as of 16:12, 10 June 2019

Games which need more than 2MiB of P ROM data use simple bankswitching in the PORT memory range ($200000~$2FFFFF), which is achieved in hardware by latches on the cartridge's PROG board. No games use bankswitching of the ROM range ($000000~$1FFFFF) ?

To switch the ROM bank, a byte needs to be written in this range. Depending on how large the ROM is, one or more bits can be used.

Pbankswitch.png

For example, the PROGBK1 board uses a 74LS74 dual D-latch to allow a 4MiB P2 ROM to be mapped in 4, 1MiB banks (2 bits, see schematic).

In this case, when a byte write is done in the $200000~$2FFFFF range, /PORTWEL falls, latching D0 and D1 which are connected to the P2 ROM's A20 and A21 lines respectively. When the NeoGeo is reset, both latches are reset to 0, to ensure that the first bank is mapped on startup.

As there is no /PORTOE signal on the cartridge edge (like /ROMOE), both /PORTOEL and /PORTOEU need to be ANDed together to make the /OE signal of P2 (if it's a 16bit ROM).

Example code

move.b #3,#$200000    ; Set bank 3, ROM's $300000~$3FFFFF appears in $200000~$2FFFFF
move.b #1,#$2B92F1    ; Set bank 1, ROM's $100000~$1FFFFF appears in $200000~$2FFFFF