CHA256: Difference between revisions

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(speculation on how the C-rom jumpers work)
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A [[NEO-273]] and a LS74 are used to address C ROM. The LS74 provides the 2 most significant bits. The LS139 enables one of four pairs of C ROMs using 2 address inputs depending on which 2 jumpers are connected.
*Max 256Mbit C ROM (8x 32Mbit)


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A [[NEO-273]] and a LS74 are used to address C ROM. The LS74 provides the 2 most significant bits. The LS139 enables one of four pairs of C ROMs using 2 address inputs depending on which 2 jumpers are connected.
*Max 256Mbit C ROM (8x 32Mbit)
*[[NEO-273]]
*[[NEO-273]]
*[[NEO-ZMC]]
*[[NEO-ZMC]]
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==AES version==
==AES version==
{| class="wikitable"
|-
!C ROM type
!Jumper set
|-
|<4MiB
|J15+J16+J17+J18
|-
|4MiB
|J11+J12+J13+J14
|}


{| class="wikitable"
{| class="wikitable"

Revision as of 20:28, 13 April 2021

C ROMs

Up to 8 * 32Mbit ROMs (27C322) can be used for a maximum of 256Mbit. 27C800/27C160 can also be used depending on jumper configuration.

The size of largest ROM is selected using a pair of jumpers. The rest should be left unconnected.

Largest C ROM Jumper set
1MiB J5+J6
2MiB J7+J8
4MiB J9+J10
C1/2 ROM type Jumper set
<4MiB J15
4MiB J11
C3/4 ROM type Jumper set
<4MiB J16
4MiB J12
C5/6 ROM type Jumper set
<4MiB J17
4MiB J13
C7/8 ROM type Jumper set
<4MiB J18
4MiB J14

A NEO-273 and a LS74 are used to address C ROM. The LS74 provides the 2 most significant bits. The LS139 enables one of four pairs of C ROMs using 2 address inputs depending on which 2 jumpers are connected.

  • Max 256Mbit C ROM (8x 32Mbit)
M1 ROM size Jumper set
64KiB J1+J4
128KiB J2+J3

AES version

C ROM type Jumper set
<4MiB J15+J16+J17+J18
4MiB J11+J12+J13+J14
EVEN delay Jumper set
1 gate J19
2 gates J20