Display timing: Difference between revisions

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[[File:disp.png|right|frame|This needs to be redone.]]
=Pixel dimensions=


In NTSC mode, the display is 320x224 pixels. In PAL mode, it is 320x256 pixels (16 pixels more at the top and bottom).
* NTSC: 384 * 264 pixels.
* PAL: 384 * 312 pixels.


Upper 9 bits of register {{Reg|REG_LSPCMODE}}:
See [[frame size]] for the '''active''' display size.
*$00F8-$00FF : Vertical sync (8px)
 
*$0100-$010F : Top border (16px)
=Sync=
*$0110-$01EF : Active display (224px)
 
*$01F0-$01FF : Bottom border (16px)
'''mclk''' refers to the 24MHz master [[clock]]. A pixel lasts 4 mclk.
 
Notes: After /RESET goes high, SYNC goes high after 1399 mclk.
 
[[File:Sync_timing.png|1024px]]


Corrected from and added on to mvstech.txt (by Charles MacDonald). mclk refers to the 24MHz master clock. A pixel is output every 4 mclk.
{{Sig|CHBL|CHBL}} is the horizontal blanking signal, it tells {{Chipname|NEO-B1}} to output color 0 of [[palettes|palette]] 0, which is the [[palettes|reference color]].


Notes: After RESET, SYNC goes high after 1399 mclk (falling edge). 112 mclk high. 1424 mclk low. 1536 mclk total. 112mclk low = 28px, 59 mclk = 14.75px, high before RESET (vblank, sync is inverted).
{{Sig|BNKB|BNKB}} is the vertical blanking signal, it forces the [[video DAC]] inputs to 0.


== Horizontal timing ==
==Horizontal==


[[File:Timing_video_lines.png]]
[[File:Timing_video_lines.png]]
[[File:Timing_video_hblank.png]]
[[File:Timing_video_hblank.png]]


*112 mclks (28px) H-sync
* 112 mclks (28px) horizontal sync pulse
*112 mclks (28px) back porch
* 112 mclks (28px) back porch
*1280 mclks (320px) active display
* 1280 mclks (320px) active display
*32 mclks (8px) front porch
* 32 mclks (8px) front porch
*256 mclks (64px) total horizontal blanking
*1536 mclks (384px) total per scanline


CHBL tells [[NEO-B1]] to output color 0 of palette 0, which is the [[palettes|reference color]].
* 32 + 112 + 112 = 256 mclks (64px) horizontal blanking
* 32 + 112 + 112 + 1280 = 1536 mclks (384px) total per scanline


[[File:Timing_video_vblank.png]]
[[File:Timing_video_vblank.png]]
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BNKB (blanking to 0V) changes state 14px after H-sync (middle of the back porch)
BNKB (blanking to 0V) changes state 14px after H-sync (middle of the back porch)


==Vertical timing==
==Vertical==
 
Corrected from and added on from mvstech.txt (by Charles MacDonald).


There are 264 scanlines per frame:
There are 264 scanlines per frame:
* 8 scanlines vertical sync pulse
* 16 scanlines top border (active in PAL, blanked in NTSC)
* 224 scanlines active display
* 16 scanlines bottom border (active in PAL, blanked in NTSC)


*8 scanlines vertical sync pulse
Upper 9 bits of register {{Reg|REG_LSPCMODE}}:
*16 scanlines top border (visible in PAL)
* $0F8~$0FF : Vertical sync (8px)
*224 scanlines active display
* $100~$10F : Top border (16px)
*16 scanlines bottom border (visible in PAL)
* $110~$1EF : Active display (224px)
* $1F0~$1FF : Bottom border (16px)


==Frame timing==
=Frame timing=


The exact framerate is 6 MHz / 384 / 264 = 59.18 Hz
See [[framerate]].


[[Category:Video system]]
[[Category:Video system]]

Latest revision as of 12:59, 6 February 2018

Pixel dimensions

  • NTSC: 384 * 264 pixels.
  • PAL: 384 * 312 pixels.

See frame size for the active display size.

Sync

mclk refers to the 24MHz master clock. A pixel lasts 4 mclk.

Notes: After /RESET goes high, SYNC goes high after 1399 mclk.

CHBL is the horizontal blanking signal, it tells NEO-B1 to output color 0 of palette 0, which is the reference color.

BNKB is the vertical blanking signal, it forces the video DAC inputs to 0.

Horizontal

  • 112 mclks (28px) horizontal sync pulse
  • 112 mclks (28px) back porch
  • 1280 mclks (320px) active display
  • 32 mclks (8px) front porch
  • 32 + 112 + 112 = 256 mclks (64px) horizontal blanking
  • 32 + 112 + 112 + 1280 = 1536 mclks (384px) total per scanline

BNKB (blanking to 0V) changes state 14px after H-sync (middle of the back porch)

Vertical

Corrected from and added on from mvstech.txt (by Charles MacDonald).

There are 264 scanlines per frame:

  • 8 scanlines vertical sync pulse
  • 16 scanlines top border (active in PAL, blanked in NTSC)
  • 224 scanlines active display
  • 16 scanlines bottom border (active in PAL, blanked in NTSC)

Upper 9 bits of register REG_LSPCMODE:

  • $0F8~$0FF : Vertical sync (8px)
  • $100~$10F : Top border (16px)
  • $110~$1EF : Active display (224px)
  • $1F0~$1FF : Bottom border (16px)

Frame timing

See framerate.