Graphics pipeline

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Revision as of 18:03, 22 April 2019 by Pnauts (talk | contribs) (First gen PRO chipset)
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First gen PRO chipset

Second gen chipset

MVS

Gpu2mvs.png

AES

Gpu2aes.png

CD gen chipset

The sprite and fix DRAM bus can be switched between from NEO-OFC and the 68k bus for upload of graphics, thus allowing software rendering.

Last gen chipset