Memory card: Difference between revisions

From NeoGeo Development Wiki
Jump to navigation Jump to search
mNo edit summary
Line 118: Line 118:
The first 20 bytes are the data title (generally the game name + the stage name).
The first 20 bytes are the data title (generally the game name + the stage name).


=Card pinout=
=Card pinout (top)=


[[File:Lh5116_pinout.png|right|frame|LH5116 pinout]]
[[File:Lh5116_pinout.png|right|frame|LH5116 pinout]]


{|class="wikitable"
{|class="wikitable"
|Pin||Goes to||Signal name||PC Card name
!Pin #||Name||Signal||Description||Goes to
|-
|-
|1||colspan="3"|GND
|1||bgcolor="#DDDDDD" colspan="4"|GND
|-
|-
|2||9 G0||MCD3||D3
|2||bgcolor="#AACCFF"|D3||CDD3||rowspan="5"|Data bus||rowspan="5"|{{Chipname|NEO-G0}}
|-
|-
|3||11 G0||MCD4||D4
|3||bgcolor="#AACCFF"|D4||CDD4
|-
|-
|4||12 G0||MCD5||D5
|4||bgcolor="#AACCFF"|D5||CDD5
|-
|-
|5||13 G0||MCD6||D6
|5||bgcolor="#AACCFF"|D6||CDD6
|-
|-
|6||14 G0||MCD7||D7
|6||bgcolor="#AACCFF"|D7||CDD7
|-
|-
|7||42, 27 C1||CRDC||/CE1
|7||bgcolor="#AA77FF"|/CE1||CRDC||Chip enable 1||{{Chipname|NEO-C1}}
|-
|-
|8||23 E0||Y10||A10
|8||bgcolor="#FFFF77"|A10||CDA10||Address||{{Chipname|NEO-E0}}
|-
|-
|9||30 C1||CRDO||/OE
|9||bgcolor="#AA77FF"|/OE||CRDO||Output enable||{{Chipname|NEO-C1}}
|-
|-
|10||24 E0||Y11||A11
|10||bgcolor="#FFFF77"|A11||CDA11||rowspan="5"|Address bus||rowspan="5"|{{Chipname|NEO-E0}}
|-
|-
|11||22 E0||Y9||A9
|11||bgcolor="#FFFF77"|A9||CDA9
|-
|-
|12||14 E0||Y8||A8
|12||bgcolor="#FFFF77"|A8||CDA8
|-
|-
|13||28 E0||Y13||A13
|13||bgcolor="#FFFF77"|A13||CDA13
|-
|-
|14||29 E0||Y14||A14
|14||bgcolor="#FFFF77"|A14||CDA14
|-
|-
|15||6 HC32||(31 C1 (CRDW) OR {{Reg|REG_CRDUNLOCK1}} OR /{{Reg|REG_CRDUNLOCK2}})||/WE
|15||bgcolor="#AA77FF"|/WE|| ||Write enable||HC32
|-
|-
|16||colspan="2"|NC||READY
|16||bgcolor="#AA77FF"|/BUSY||Low when card is busy||colspan="2"|Not used
|-
|-
|17||colspan="3"|VCC
|17||bgcolor="#FF8888" colspan="4"|VCC
|-
|-
|18||colspan="3"|VCC
|18||bgcolor="#FF4444" colspan="4"|VPP
|-
|-
|19||39 E0||Y16||A16
|19||bgcolor="#FFFF77"|A16||CDA16||rowspan="11"|Address bus||rowspan="11"|{{Chipname|NEO-E0}}
|-
|-
|20||30 E0||Y15||A15
|20||bgcolor="#FFFF77"|A15||CDA15
|-
|-
|21||27 E0||Y12||A12
|21||bgcolor="#FFFF77"|A12||CDA12
|-
|-
|22||13 E0||Y7||A7
|22||bgcolor="#FFFF77"|A7||CDA7
|-
|-
|23||12 E0||Y6||A6
|23||bgcolor="#FFFF77"|A6||CDA6
|-
|-
|24||11 E0||Y5||A5
|24||bgcolor="#FFFF77"|A5||CDA5
|-
|-
|25||9 E0||Y4||A4
|25||bgcolor="#FFFF77"|A4||CDA4
|-
|-
|26||8 E0||Y3||A3
|26||bgcolor="#FFFF77"|A3||CDA3
|-
|-
|27||7 E0||Y2||A2
|27||bgcolor="#FFFF77"|A2||CDA2
|-
|-
|28||6 E0||Y1||A1
|28||bgcolor="#FFFF77"|A1||CDA1
|-
|-
|29||5 E0||Y0||A0
|29||bgcolor="#FFFF77"|A0||CDA0
|-
|-
|30||6 G0||MCD0||D0
|30||bgcolor="#AACCFF"|D0||CDD0||rowspan="3"|Data bus||rowspan="3"|{{Chipname|NEO-G0}}
|-
|-
|31||7 G0||MCD1||D1
|31||bgcolor="#AACCFF"|D1||CDD1
|-
|-
|32||8 G0||MCD2||D2
|32||bgcolor="#AACCFF"|D2||CDD2
|-
|-
|33||88 C1||IN26 ({{Reg|REG_STATUS_B}} bit 6)||WP (Write Protect)
|33||bgcolor="#AA77FF"|WP||WP||High if card is write-protected||{{Chipname|NEO-C1}}
|-
|-
|34||colspan="3"|GND
|34||bgcolor="#DDDDDD" colspan="4"|GND
|}
|}
=Card pinout (bottom)=


{|class="wikitable"
{|class="wikitable"
|Pin||Goes to||Signal name||PC Card name
!Pin #||Name||Signal||Description||Goes to
|-
|-
|35||colspan="3"|GND
|35||bgcolor="#DDDDDD" colspan="4"|GND
|-
|-
|36||73 C1||IN24 ({{Reg|REG_STATUS_B}} bit 4)||/CD1 (Card Detect 1)
|36||bgcolor="#DDDDDD"|/CD1||CD1||Card detect||{{Chipname|NEO-C1}}
|-
|-
|37||30 G0||MCD11||D11
|37||bgcolor="#AACCFF"|D11||CDD11||rowspan="5"|Data bus||rowspan="5"|{{Chipname|NEO-G0}}
|-
|-
|38||43 G0||MCD12||D12
|38||bgcolor="#AACCFF"|D12||CDD12
|-
|-
|39||44 G0||MCD13||D13
|39||bgcolor="#AACCFF"|D13||CDD13
|-
|-
|40||45 G0||MCD14||D14
|40||bgcolor="#AACCFF"|D14||CDD14
|-
|-
|41||46 G0||MCD15||D15
|41||bgcolor="#AACCFF"|D15||CDD15
|-
|-
|42||7|| ||/CE2
|42||bgcolor="#AA77FF"|/CE2||CRDC||Chip enable 2||{{Chipname|NEO-C1}}
|-
|-
|43||colspan="2"|NC||/VS1
|43||bgcolor="#AA77FF"|/VS1||colspan="3" rowspan="3"|Not used
|-
|-
|44||colspan="2"|NC||/IORD
|44||bgcolor="#AA77FF"|/IORD
|-
|-
|45||colspan="2"|NC||/IOWR
|45||bgcolor="#AA77FF"|/IOWR
|-
|-
|46||40 E0||Y17||A17
|46||bgcolor="#FFFF77"|A17||CDA17||rowspan="5"|Address bus||rowspan="5"|{{Chipname|NEO-E0}}
|-
|-
|47||41 E0||Y18||A18
|47||bgcolor="#FFFF77"|A18||CDA18
|-
|-
|48||43 E0||Y19||A19
|48||bgcolor="#FFFF77"|A19||CDA19
|-
|-
|49||44 E0||Y20||A20
|49||bgcolor="#FFFF77"|A20||CDA20
|-
|-
|50||45 E0||Y21||A21
|50||bgcolor="#FFFF77"|A21||CDA21
|-
|-
|51||colspan="3"|VCC
|51||bgcolor="#FF8888" colspan="4"|VCC
|-
|-
|52||colspan="3"|VCC
|52||bgcolor="#FF8888" colspan="4"|VCC
|-
|-
|53||46 E0||Y22||A22
|53||bgcolor="#FFFF77"|A22||CDA22||rowspan="2"|Address bus||rowspan="2"|{{Chipname|NEO-E0}}
|-
|-
|54||47 E0||Y23||A23
|54||bgcolor="#FFFF77"|A23||CDA23
|-
|-
|55||colspan="2"|NC||A24
|55||bgcolor="#FFFF77"|A24||colspan="3" rowspan="5"|Not used
|-
|-
|56||colspan="2"|NC||A25
|56||bgcolor="#FFFF77"|A25
|-
|-
|57||colspan="2"|NC||/VS2
|57||bgcolor="#AA77FF"|/VS2
|-
|-
|58||colspan="2"|NC||RESET
|58||bgcolor="#AA77FF"|RESET
|-
|-
|59||colspan="2"|NC||/WAIT
|59||bgcolor="#AA77FF"|/WAIT
|-
|-
|60||colspan="2"|NC||Reserved
|60||NC||colspan="3"|Reserved
|-
|-
|61||8 HC32||({{Reg|REG_CRDREGSEL}} OR CRDO)||/REG
|61||bgcolor="#AA77FF"|/REG|| ||Select attribute memory||HC32
|-
|-
|62||colspan="2"|NC||BVD2
|62||bgcolor="#AA77FF"|BVD2||rowspan="2"|Battery voltage detect||colspan="2" rowspan="2"|Not used
|-
|-
|63||colspan="2"|NC||BVD1
|63||bgcolor="#AA77FF"|BVD1
|-
|-
|64||27 G0||MCD8||D8
|64||bgcolor="#AACCFF"|D8||CDD8||rowspan="3"|Data bus||rowspan="3"|{{Chipname|NEO-G0}}
|-
|-
|65||28 G0||MCD9||D9
|65||bgcolor="#AACCFF"|D9||CDD9
|-
|-
|66||29 G0||MCD10||D10
|66||bgcolor="#AACCFF"|D10||CDD10
|-
|-
|67||87 C1||IN25 ({{Reg|REG_STATUS_B}} bit 5)||/CD2 (Card Detect 2)
|67||bgcolor="#DDDDDD"|/CD2||CD2||Card detect||{{Chipname|NEO-C1}}
|-
|-
|68||colspan="3"|GND
|68||bgcolor="#DDDDDD" colspan="4"|GND
|}
|}


[[Category:Cartridge systems]]
[[Category:Cartridge systems]]

Revision as of 00:12, 9 March 2017

JEIDA V3 memory cards used in AES and some MVS systems to store game saves and/or high scores. The original SNK card could only hold 2KiB of data.

Picture by HPMAN

The official SNK memory card was a battery-based 2KiB card using a LH5116 CMOS SRAM chip and voltage switching circuitry. Data retention voltage: 2V.

The SP-S2 system ROM can handle memory cards up to 16KiB

Replaced by a 8KiB fixed battery-backed RAM chip in the CD systems.

See the CARD BIOS call description for memory card operations.

Data format

BIOS can handle 8 different card size (2K, 4K, 6K, 8K, 10K, 14K and 16K) and different card type (8 bits wide, 16 bits wide, 16 bits doubled wide and SNK ROM card).

All the data here are for all the card, it's just a matter on how to read the data between different type of card.

The internal card data are splitted into 5 regions.

Header

Always $80 bytes.

Address Name Size Description
$0~$9 10 bytes Zero or "SNK ROM " (Development unit I think)

For 16bits doubled card, $6 is set to $0001

$A CARD_SIZE word Size of the memcard
$C byte 0
$D CARD_FAT_1_CHKSUM byte Checksum of the FAT 1
$E CARD_FAT_2_CHKSUM byte Checksum of the FAT 2
$F CARD_USERNAME_AVAILABLE byte 0 : Username available, !0 : Username unavailable
$10 CARD_USERNAME 16 bytes Card holder username
$20 CARD_MAGIC 16 bytes $4e $XX $45 $XX $4f $XX $2d $XX $47 $XX $45 $XX $4f $XX 80 $XX "NEO-GEO" + $80
$30 CARD_REGION byte Region of slot that formated the card, 0 = Japan, 1 = USA, 2 = Europe

Directory

List of saves. Size depends on card size, it can hold 32, 64, 96, 128, 160, 192, 224 or 256 entries.

Each entry have this format :

Address Size Description
$0 byte Game Sub number (CARD_SUB), 0 to 15. $FF if entry is free
$1 word Game NGH number
$3 byte FAT entry number (see below)

FAT 1

List of used blocks. Size depends on card size, it can hold 64, 128 192 or 256 entries.

  • $02 is a BIOS reserved block
  • $01 is a game used block
  • $00 is a free block

FAT 2

FAT 2 is simply a mirror of FAT 1.

Game Data

Normally 64 bytes but maybe some games use more that one block ?

The first 20 bytes are the data title (generally the game name + the stage name).

Card pinout (top)

LH5116 pinout
Pin # Name Signal Description Goes to
1 GND
2 D3 CDD3 Data bus NEO-G0
3 D4 CDD4
4 D5 CDD5
5 D6 CDD6
6 D7 CDD7
7 /CE1 CRDC Chip enable 1 NEO-C1
8 A10 CDA10 Address NEO-E0
9 /OE CRDO Output enable NEO-C1
10 A11 CDA11 Address bus NEO-E0
11 A9 CDA9
12 A8 CDA8
13 A13 CDA13
14 A14 CDA14
15 /WE Write enable HC32
16 /BUSY Low when card is busy Not used
17 VCC
18 VPP
19 A16 CDA16 Address bus NEO-E0
20 A15 CDA15
21 A12 CDA12
22 A7 CDA7
23 A6 CDA6
24 A5 CDA5
25 A4 CDA4
26 A3 CDA3
27 A2 CDA2
28 A1 CDA1
29 A0 CDA0
30 D0 CDD0 Data bus NEO-G0
31 D1 CDD1
32 D2 CDD2
33 WP WP High if card is write-protected NEO-C1
34 GND

Card pinout (bottom)

Pin # Name Signal Description Goes to
35 GND
36 /CD1 CD1 Card detect NEO-C1
37 D11 CDD11 Data bus NEO-G0
38 D12 CDD12
39 D13 CDD13
40 D14 CDD14
41 D15 CDD15
42 /CE2 CRDC Chip enable 2 NEO-C1
43 /VS1 Not used
44 /IORD
45 /IOWR
46 A17 CDA17 Address bus NEO-E0
47 A18 CDA18
48 A19 CDA19
49 A20 CDA20
50 A21 CDA21
51 VCC
52 VCC
53 A22 CDA22 Address bus NEO-E0
54 A23 CDA23
55 A24 Not used
56 A25
57 /VS2
58 RESET
59 /WAIT
60 NC Reserved
61 /REG Select attribute memory HC32
62 BVD2 Battery voltage detect Not used
63 BVD1
64 D8 CDD8 Data bus NEO-G0
65 D9 CDD9
66 D10 CDD10
67 /CD2 CD2 Card detect NEO-C1
68 GND