Memory card pinout

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Top row

LH5116 pinout
Pin # Name Signal Description Goes to
1 GND
2 D3 CDD3 Data bus Chipicon.png NEO-G0
3 D4 CDD4
4 D5 CDD5
5 D6 CDD6
6 D7 CDD7
7 /CE1 CRDC Chip enable 1 Chipicon.png NEO-C1
8 A10 CDA10 Address Chipicon.png NEO-E0
9 /OE CRDO Output enable Chipicon.png NEO-C1
10 A11 CDA11 Address bus Chipicon.png NEO-E0
11 A9 CDA9
12 A8 CDA8
13 A13 CDA13
14 A14 CDA14
15 /WE Write enable HC32
16 /BUSY Low when card is busy Not used
17 VCC
18 VPP
19 A16 CDA16 Address bus Chipicon.png NEO-E0
20 A15 CDA15
21 A12 CDA12
22 A7 CDA7
23 A6 CDA6
24 A5 CDA5
25 A4 CDA4
26 A3 CDA3
27 A2 CDA2
28 A1 CDA1
29 A0 CDA0
30 D0 CDD0 Data bus Chipicon.png NEO-G0
31 D1 CDD1
32 D2 CDD2
33 WP WP High if card is write-protected Chipicon.png NEO-C1
34 GND

Bottom row

Pin # Name Signal Description Goes to
35 GND
36 /CD1 CD1 Card detect Chipicon.png NEO-C1
37 D11 CDD11 Data bus Chipicon.png NEO-G0
38 D12 CDD12
39 D13 CDD13
40 D14 CDD14
41 D15 CDD15
42 /CE2 CRDC Chip enable 2 Chipicon.png NEO-C1
43 /VS1 Not used
44 /IORD
45 /IOWR
46 A17 CDA17 Address bus Chipicon.png NEO-E0
47 A18 CDA18
48 A19 CDA19
49 A20 CDA20
50 A21 CDA21
51 VCC
52 VCC
53 A22 CDA22 Address bus Chipicon.png NEO-E0
54 A23 CDA23
55 A24 Not used
56 A25
57 /VS2
58 RESET
59 /WAIT
60 NC Reserved
61 /REG Select attribute memory HC32
62 BVD2 Battery voltage detect Not used
63 BVD1
64 D8 CDD8 Data bus Chipicon.png NEO-G0
65 D9 CDD9
66 D10 CDD10
67 /CD2 CD2 Card detect Chipicon.png NEO-C1
68 GND