Memory mapped registers

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Address decode masks

Decode masks aren't verified !

Decode masks are used to know which register will be mapped to a precise address, they can be seen as a sort of mirroring range notation.

A "1" bit means that the corresponding address line is involved in decoding, a "0" bit means it can be anything.

For example, Reg.png REG_P1CNT's base is $300000 and its mask is $FE0001:

BASE 00110000 00000000 00000000
MASK 11111110 00000000 00000001
     0011000x xxxxxxxx xxxxxxx0

This means that it should also be accessible at $300002, $300004, $300006... up to $31FFFE. The highest address is BASE OR (NOT MASK).

Mirror guesser


Register descriptions

I/O registers

REG_P1CNT

Read Write
Joypad port 1 inputs (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
?
  • Address: $300000
  • Decode mask: $FE0001
  • Handled by: Chipicon.png NEO-C1



REG_DIPSW

Read Write
Hardware DIPs (active low)
Bit 7 6 5 4 3 2 1 0
Def Freeze FreeplayEnable MultiplayerComm. ID code0:Normal controller
1:Mahjong keyboard
0:1 chute
1:2 chutes
Settings mode
Kick watchdog
  • Address: $300001
  • Decode mask: $FE0081 (not sure for write)
  • Handled by: Chipicon.png NEO-F0 (read), Chipicon.png NEO-B1 (write)



REG_SYSTYPE

Read Write
Bit 7 6 5 4 3 2 1 0
Def Test button Type?
?

Reads the unused DSW2 on Pcb.pngMV4 boards. Used for system ID on other boards.

  • Address: $300081
  • Decode mask: $FE0081
  • Handled by: Chipicon.png NEO-F0



REG_SOUND

Read Write
Read Z80 reply code Send command to Chipicon.png Z80
  • Address: $320000
  • Decode mask: $FE0001
  • Handled by: Chipicon.png NEO-C1



REG_STATUS_A

Read Write
Switch inputs are active low
Bit 7 6 5 4 3 2 1 0
Def RTC data bit RTC time pulse0:4-SLOT
1:6-SLOT
Coin-in 4Coin-in 3Service buttonCoin-in 2Coin-in 1
?
  • Address: $320001
  • Decode mask: $FE0001
  • Handled by: Chipicon.png NEO-F0



REG_P2CNT

Read Write
Joypad port 2 inputs (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
?
  • Address: $340000
  • Decode mask: $FE0001
  • Handled by: Chipicon.png NEO-C1



REG_STATUS_B

Read Write
Aux inputs (active low)
Bit 7 6 5 4 3 2 1 0
Def 0:AES
1:MVS
Memory card
write protected
Memory card
inserted if 00
Select P2Start P2Select P1Start P1
?
  • Address: $380000
  • Decode mask: $FE0001
  • Handled by: Chipicon.png NEO-C1



REG_POUTPUT

Read Write
? Joypad ports outputs
Bit 7 6 5 4 3 2 1 0
Def ? P2 outputsP1 outputs
  • Address: $380001
  • Decode mask: $FE0071
  • Handled by: Chipicon.png NEO-D0



REG_CRDBANK

Read Write
?
Bit 7 6 5 4 3 2 1 0
Def Memory card bank selection
  • Address: $380011
  • Decode mask: $FE0071
  • Handled by: Chipicon.png NEO-D0



REG_SLOT

Read Write
?
Bit 7 6 5 4 3 2 1 0
Def ? Slot #

(Mirror of REG_POUTPUT on the AES)

  • Address: $380021
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-F0



REG_LEDLATCHES

Read Write
?
Bit 7 6 5 4 3 2 1 0
Def ? Latch LED2 dataLatch LED1 dataLatch marquee data?

LED data is latched on 1 to 0 transition.

  • Address: $380031
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-F0



REG_LEDDATA

Read Write
? 8-bit data for LEDs and marquee. See MV-LED.
  • Address: $380041
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-F0



REG_RTCCTRL

Read Write
? MAME upd4990a_control_16_w
Bit 7 6 5 4 3 2 1 0
Def RTC StrobeRTC ClockRTC DIN
  • Address: $380051
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-F0



REG_RESETCC1

Read Write
? Any, coin counter 1 floats
  • Address: $380061
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_RESETCC2

Read Write
? Any, coin counter 2 floats
  • Address: $380063
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_RESETCL1

Read Write
? Any, coin lockout 1 floats
  • Address: $380065
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_RESETCL2

Read Write
? Any, coin lockout 2 floats
  • Address: $380067
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_SETCC1

Read Write
? Any, coin counter 1 sinks current
  • Address: $3800E1
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_SETCC2

Read Write
? Any, coin counter 2 sinks current
  • Address: $3800E3
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_SETCL1

Read Write
? Any, coin lockout 1 sinks current
  • Address: $3800E5
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0



REG_SETCL2

Read Write
? Any, coin lockout 2 sinks current
  • Address: $3800E7
  • Decode mask: $FE00F1
  • Handled by: Chipicon.png NEO-I0

System registers

Handled by a 74HC259 addressable latch on cart systems. Byte writes only. Decode mask: $FE0001. Registers go in pairs, bit 4 of address is the data bit.

Address Name Write
$3A0001 REG_NOSHADOW Normal video output
$3A0011 REG_SHADOW Darken video output
$3A0003 REG_SWPBIOS BIOS vector table
$3A0013 REG_SWPROM Use the cart's vector table
$3A0005 REG_CRDUNLOCK1 Enable writes to memory card (use REG_CRDUNLOCK2 too)
$3A0015 REG_CRDLOCK1 Disable writes to memory card
$3A0007 REG_CRDLOCK2 Disable writes to memory card
$3A0017 REG_CRDUNLOCK2 Enable writes to memory card (use REG_CRDUNLOCK1 too)
$3A0009 REG_CRDREGSEL Enable "Register select" for memory card
$3A0019 REG_CRDNORMAL Disable "Register select" for memory card
$3A000B REG_BRDFIX Use the embedded SFIX ROM and SM1 ROM
$3A001B REG_CRTFIX Use the cart's S ROM and M1 ROM
$3A000D REG_SRAMLOCK Write-protects backup RAM (MVS)
$3A001D REG_SRAMUNLOCK Unprotects backup RAM (MVS)
$3A000F REG_PALBANK1 Use palette bank 1
$3A001F REG_PALBANK0 Use palette bank 0

Video registers

Handled by the GPUs. Byte writes only work on even addresses and stores the same data in the MSB and LSB. Odd addresses aren't mapped ? Decode mask: $FE0001.

Address Name Read Write
$3C0000 REG_VRAMADDR Read VRAM (address isn't changed) Sets VRAM address
$3C0002 REG_VRAMRW Read VRAM (address isn't changed) Write VRAM
$3C0004 REG_VRAMMOD Reads VRAM address modulo Sets VRAM address modulo (signed)
$3C0006 REG_LSPCMODE
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Raster line counter.
See Display timing
-1:50Hz
0:60Hz (LSPC2 only)
Auto animation counter
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Auto animation speed
(in frames)
Timer interrupt
mode
Timer interrupt enableDisable auto animation?
$3C0008 REG_TIMERHIGH Like REG_VRAMADDR. MSBs of timer reload value.
$3C000A REG_TIMERLOW Like REG_VRAMRW. LSBs of timer reload value.
$3C000C REG_IRQACK Like REG_VRAMMOD. Interrupt Acknowledge (byte !).
Bit 7 6 5 4 3 2 1 0
Def ? Ack VBlankAck HBlankAck IRQ3
$3C000E REG_TIMERSTOP Like REG_LSPCMODE. Bit 0=1: Stops timer counter during first and last 16 lines (32 total) when in PAL mode.


NeoGeo CD registers

NEO-MGA / LC8953 / LC98000 ?

CD drive

Address Name Size Read Write Handled by
$FF0161 REG_CDDINPUT Byte
Bit 7 6 5 4 3 2 1 0
Def ? CDCK input4-bit bus from the CD drive
? NEO-MGA
$FF0163 REG_CDDOUTPUT Byte ? 4-bit bus to the CD drive NEO-MGA
$FF0165 REG_CDDCTRL Byte ?
Bit 7 6 5 4 3 2 1 0
Def ? Bus direction ?
0:Input
1:Output
HOCK output
NEO-MGA

Video

Address Name Size Read Write Handled by
$FF0111 REG_DISBLSPR Byte ? 1=Disable 0=Enable sprites NEO-GRC/NEO-OFC
$FF0115 REG_DISBLFIX Byte ? 1=Disable 0=Enable fix layer
$FF0119 REG_ENVIDEO Byte ? Video output. 1=Enable 0=Disable

Memory

Address Name Size Read Write Handled by
$FF01A1 REG_SPRBANK Byte ? Upload zone 1MiB SPR DRAM bank selection ?
$FF01A3 REG_PCMBANK Byte ? Upload zone 512KiB PCM DRAM bank selection ?
$FF0121 REG_UPMAPSPR Byte ? NeoSetSpriteSlot(1);

Set upload zone to SPR DRAM

?
$FF0123 REG_UPMAPPCM Set upload zone to PCM DRAM
$FF0127 REG_UPMAPZ80 Set upload zone to Z80 DRAM
$FF0129 REG_UPMAPFIX Set upload zone to FIX DRAM
$FF0141 REG_UPUNMAPSPR Unset SPR DRAM to upload zone
$FF0143 REG_UPUNMAPPCM Unset PCM DRAM to upload zone
$FF0147 REG_UPUNMAPZ80 Unset Z80 DRAM to upload zone
$FF0149 REG_UPUNMAPFIX Unset FIX DRAM to upload zone

DMA

Address Name Size Read Write Handled by
$FF0061 ? Byte ? Bit 6: Execute DMA microcode LC8953
$FF0064~$FF0067 REG_DMA_ADDR1 Longword ? Sets DMA source address.
$FF0068~$FF006B REG_DMA_ADDR2 Longword ? Sets DMA destination address.
$FF006C~$FF006F REG_DMA_VALUE Longword ? Sets DMA value for filling.
$FF0070~$FF0073 REG_DMA_COUNT Longword ? Sets DMA length.
$FF007E REG_DMA_MODE Word ? Sets DMA mode.
$FF0080~$FF008E ? Words ? Microcode (16x 9-bit opcodes ?)

Unkown

Address Name Size Read Write Handled by
$FF0002 ? Word ? NeoRaine load_files, really interrupt mask ? ?
$FF0004 ? Word ? CDM3-2 BIOS writes 0,1,3,7 ?
$FF0006 ? Word ? CDM3-2 BIOS writes 0x71FF, CDZ writes 0x71FF ?
$FF0008 ? Word ? CDM3-2 BIOS writes 0x0000, CDZ writes 0x0000 ?
$FF000A ? Word ? CDM3-2 BIOS writes 0x7E40, CDZ writes 0x7E00 ?
$FF000E ? Byte ? CDM3-2 BIOS writes $3F,$3C ?
$FF000F ? Byte ? NeoCDIRQUpdate(byteValue);

CDM3-2 BIOS writes $20,$10,$08,$04

?
$FF0011 ? Byte ? CDM3-2 BIOS writes $FE ?
$FF0017 ? Byte nNeoCDMode

CDM3-2 BIOS read/writes bit 0

?
$FF0101 ? Byte nLC8951Register (4 LSB)

CDM3-2 BIOS writes low nibble

LC8951
$FF0103 ? Byte nLC8951Register value

CDM3-2 BIOS writes 0x10, CDZ writes 0x00 (start up init)

LC8951
$FF0105 ? Byte ? nActiveTransferArea = byteValue

upload_type_w

?
$FF0108 ? Word ? CDM3-2 BIOS writes $5555 ?
$FF010C ? Word ? CDM3-2 BIOS writes $5555 and reads ?
$FF011C REG_CDCONFIG Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def 1 CD Mech
0:TOP/CDZ
1:FRONT
Lid Status
(Opposite on CDZ)
Configuration
jumpers
?
? NEO-CDD board
$FF016D Byte ? MapVectorTable(!(byteValue == 0xFF)); ?
$FF016F REG_DISBLIRQ Byte ? Disable/enable interrupts nTransferWriteEnable = byteValue ?
$FF0181 REG_CDRST Byte ? CD drive /RESET ?
$FF0183 REG_Z80RST Byte ? Z80 /RESET ?
$FF01A7 ? Byte ? CDM3-2 BIOS writes ?

CDDA

Address Name Size Read Write Handled by
$FF0188 REG_CDDALEFTL Word See Reading CDDA sound levels No effect NEO-MGA
$FF018A REG_CDDARIGHTL
$FF01FC ? Word ? CDDA control ? ?
$FF01FE ? Word ? CD music/data switch ? ?