NEO-CMC: Difference between revisions

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*And a new scrambling system for that interlaces M1 + (CX + S1) ROM data
*And a new scrambling system for that interlaces M1 + (CX + S1) ROM data


inicially the released model of CMC was '''NEO-CMC42''' on the following cartridges:
#Inicially the released model of CMC was '''NEO-CMC42''' on the following cartridges:
{|  
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|'''CART ID'''  
|'''CART ID'''  
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This version had only S1 and CRoms Encrypted and M1 remained in normal condition (unencrypted)
This version had only S1 and CRoms Encrypted and M1 remained in normal condition (unencrypted). This was just a "test", to see if SNK and Toshiba could be more further in protection. Almost one year later SNK decided release one more layer on the algorithm, to encrypt M1 on the mixer.


This was just a "test", to see if SNK and Toshiba could be more further in protection.
#So they released the model NEO-CMC50 on the following cartridges:
 
Almost one year later SNK decided release one more layer on the algorithm, to encrypt M1 on the mixer.
So they released the model NEO-CMC50 on the following cartridges:
{|
{|
|'''CART ID'''  
|'''CART ID'''  

Revision as of 12:29, 2 December 2011

"CMC42" chip on a MVS cartridge. Picture courtesy of [MVS-Scans].

The most "basic" information published can be found at [MAME:neocrypt.c]

Bellow the detailed information:

The NEO-CMC Chip is a Asic (Application Specific Integrated Circuit). This device can be programmed only once after be created severals prototypes until reach the stable condiction, using FPGA (Field Programmable Gate Array). The Asci must be considerated a final step from this process.

To get a intuition about costs related, please read this: [FPGA vs ASICs production and design]

SNK had planned to put his next protection to try avoid NeoGeo piracy using the NEOCMC algorithm.

Because Toshiba was partner and not only made solution to hold data on it's Mask Roms (TC5xxxx), they has used its technology in Asic solutions to help to create this Chip. Until 1995 Toshiba had a line of Asics called TC190G series, the evolution of this series can be found at [Toshiba Technology RoadMap].

The serie that SNK get advantage to build a valuable chip with it's algorithm to protect Cs and S1 initially was the serie TC190G:

The series TC190G cannot be found in datasheets anymore, but in past years had these models:

  • TC190G06CF7008
  • TC190G06CF7042
  • TC190G06CF7050

and more...

Apparently the last two models was used because the number of internal number of gates acceptable to the logic SNK have developed:

  • NEO-ZMC
  • NEO-273
  • And a new scrambling system for that interlaces M1 + (CX + S1) ROM data
  1. Inicially the released model of CMC was NEO-CMC42 on the following cartridges:
CART ID TITLE NAME
070 Zupapa
251 King Of Fighters 99
252 Ganryu
253 Garou Mark Of the Wolves
254 Strikers 1945
255 Prehistoric Isle 2
256 Metal Slug 3
259 Bang Bead
260 Nightmare in the Dark
261 Sengoku 3

This version had only S1 and CRoms Encrypted and M1 remained in normal condition (unencrypted). This was just a "test", to see if SNK and Toshiba could be more further in protection. Almost one year later SNK decided release one more layer on the algorithm, to encrypt M1 on the mixer.

  1. So they released the model NEO-CMC50 on the following cartridges:
CART ID TITLE NAME
008 Jockey Grand Prix
257 King Of Figthers 2000
262 King Of Figthers 2001
263 Metal Slug 4
264 Rage of the Dragons
265 King Of Fighters 2002
266 Power Instinct - Matrimele
267 Pochi to Nyaa
268 Metal Slug 5
269 SNK vs Capcom Chaos
270 Samurai Showdown Zero / Samurai Showdown 5
271 King of Fighters 2003
272 Samurai Showdown Zero Special / Samurai Showdown 5 Special

About Jockey Gran Prix, some peoples say this game is not official release but it´s not true. At least its production of the card is official, because they had used the REAL Encryption that cannot be mocked easly. Only the Toshiba and SNK knew the encryption and until today "NO ONE" piracy goes so forensic to mock it. Explanation Later.


File:Brd cmcnoref.jpg
"CMC50"

Also found on ROM-only arcade boards, without the "NEO-CMC" marking.

Pinout

Notes:

  • C_e_D[0-15]: C1/C3/C5/C7 data bus
  • C_o_D[0-15]: C2/C4/C6/C8 data bus
  • CX A[0-21]: C1/C2/C3/C4/C5/C6/C7/C8 address bus
  • Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts
  • Pins 89 and 92 are short circuited in Cartridge board.