NEO-D0: Difference between revisions

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[[File:aes_d0.jpg|right|thumb|NEO-D0 chip found on an AES board.]]
{{ChipInfo
|picture=aes_d0.jpg
|pkg=QFP64R
|manu=fujitsu
|date=1990 ?
|gates=
|used_on={{PCB|MV4}} and many more...
}}


Probably similar to [[NEO-SUD]] on the NeoGeo CD. Close to the audio hardware.
* Clock divider
* {{Chipname|Z80}} memory and [[Z80 port map|port]] control
* {{Chipname|YM2610}} interface
* [[Memory card]] bank selection
* [[Joypad]] outputs


=Pinouts=
Maybe similar to {{Chipname|NEO-SUD}} on the NeoGeo CD. Close to the audio hardware.
[[File:Neo-d0_pinout.png]]


*D0~D5: [[68k]] data bus
=Pinout=
*A4: 68k address line
 
*4116CS: [[Z80]] RAM /CS
{{Pinout|NEO-D0|640}}
*2610*: [[YM2610]] control lines
 
*OUT1~OUT6: [[Joypad]] outputs
 
*SDMRD/SDMRW: Z80 [[SM1]]/RAM control lines
=Internal schematic=
*SDZ80*: From [[NEO-C1]]
 
[[File:Neo-d0_sd.png]]
 
=Signals=
 
* {{Sig|D*|D*}}: {{Chipname|68k}} data bus for [[joypad]] outputs
* {{Sig|BNK*|BNK*}}: [[Memory card]] upper address lines to {{Chipname|NEO-E0}}
* {{Sig|A4|A4}}: 68k address line for decoding
* {{Sig|6116CS|6116CS}}: [[Z80 RAM]] select
* 2610*: YM2610 control outputs
* {{Sig|OUT*|OUT*}}: Joypad outputs
* {{Sig|SDMRD|SDMRD}}: Z80 ROM/RAM read
* {{Sig|SDMRW|SDMRW}}: Z80 RAM write
* {{Sig|SDRD*|SDRD*}}: Z80 port read to {{Chipname|NEO-ZMC}} in cartridge
* {{Sig|SDZ80CLR|SDZ80CLR}}: Clear command code in {{Chipname|NEO-C1}}
* {{Sig|SDZ80RD|SDZ80RD}}: Read command code from {{Chipname|NEO-C1}}
* {{Sig|SDZ80WR|SDZ80WR}}: Write reply code to {{Chipname|NEO-C1}}


[[Category:Chips]]
[[Category:Chips]]

Latest revision as of 14:43, 21 May 2020

Package QFP64R
Manufacturer
First use 1990 ?
Used on MV4 and many more...

Maybe similar to NEO-SUD on the NeoGeo CD. Close to the audio hardware.

Pinout


Edit this pinout


Internal schematic

Signals