NEO-DCR-T: Difference between revisions

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[[File:brd_dcr-t.jpg|thumb|NEO-DCR-T on a [[ROM-Only boards|ROM-only arcade board]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]]
{{ChipInfo
|picture=neo-dcr-t.jpg
|pkg=QFP100R
|manu=toshiba
|date=1995 ?
|gates=
|used_on={{PCB|MV1B}} ...
}}


Chip found next to the DIP switches on ROM-only arcade boards.  
Chip found on late [[MVS hardware|MVS]] boards and next to the [[Hardware DIPs|DIP switches]] on [[ROM-Only boards]].
 
* Address decoding
* Coin I/O
* [[Memory_mapped_registers#System_registers|System register]]
* [[Wait cycle]] generator
 
=Pinout=
 
{{Pinout|NEO-DCR|900}}
 
* DIPRD0 and DIPRD1 go to a {{Chipname|NEO-BUF}} chip to gate the remaining DIP switch bits and RTC inputs
* Pin 85 might be an input
* No [[memory card]] control signals ?


[[Category:Chips]]
[[Category:Chips]]

Latest revision as of 01:58, 8 July 2018

Package QFP100R
Manufacturer
First use 1995 ?
Used on MV1B ...

Chip found on late MVS boards and next to the DIP switches on ROM-Only boards.

Pinout


Edit this pinout

  • DIPRD0 and DIPRD1 go to a NEO-BUF chip to gate the remaining DIP switch bits and RTC inputs
  • Pin 85 might be an input
  • No memory card control signals ?