Difference between revisions of "NEO-DCR-T"

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[[File:brd_dcr-t.jpg|thumb|NEO-DCR-T on a [[ROM-Only boards|ROM-only arcade board]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]]
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{{ChipInfo
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|picture=neo-dcr-t.jpg
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|pkg=QFP100R
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|manu=toshiba
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|date=1995 ?
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|gates=
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|used_on={{PCB|MV1B}} ...
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}}
  
Chip found next to the DIP switches on ROM-only arcade boards.  
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Chip found on late [[MVS hardware|MVS]] boards and next to the [[Hardware DIPs|DIP switches]] on [[ROM-Only boards]].
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* Address decoding
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* Coin I/O
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* [[Memory_mapped_registers#System_registers|System register]]
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* [[Wait cycle]] generator
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=Pinout=
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{{Pinout|NEO-DCR|900}}
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* DIPRD0 and DIPRD1 go to a {{Chipname|NEO-BUF}} chip to gate the remaining DIP switch bits and RTC inputs
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* Pin 85 might be an input
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* No [[memory card]] control signals ?
  
 
[[Category:Chips]]
 
[[Category:Chips]]

Latest revision as of 01:58, 8 July 2018

Neo-dcr-t.jpg
Package QFP100R
Manufacturer Logo toshiba.jpg
First use 1995 ?
Used on MV1B ...

Chip found on late MVS boards and next to the DIP switches on ROM-Only boards.

Pinout

NEO-DCR pinout.png
Edit this pinout

  • DIPRD0 and DIPRD1 go to a NEO-BUF chip to gate the remaining DIP switch bits and RTC inputs
  • Pin 85 might be an input
  • No memory card control signals ?