NEO-DCR-T: Difference between revisions

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* Coin I/O
* Coin I/O
* [[Memory_mapped_registers#System_registers|System register]]
* [[Memory_mapped_registers#System_registers|System register]]
* [[Wait state]] generator
* [[Wait cycle]] generator


=Pinout=
=Pinout=


Todo: COUNT* are outputs. BOARD go to the vertical board on MV1B.
{{Pinout|NEO-DCR|900}}
 
[[File:Neo-dcr_pinout.png]]
 
Draft pinout: [[File:neo-dcr.odg]]


* DIPRD0 and DIPRD1 go to a {{Chipname|NEO-BUF}} chip to gate the remaining DIP switch bits and RTC inputs
* DIPRD0 and DIPRD1 go to a {{Chipname|NEO-BUF}} chip to gate the remaining DIP switch bits and RTC inputs
* Pin 85 might be an input
* Pin 85 might be an input
* Some BOARD pins must be ROMOE*, PORTOE*, PORTWE*... SFIX select...
* No [[memory card]] control signals ?
* No [[memory card]] control signals ?


[[Category:Chips]]
[[Category:Chips]]

Latest revision as of 01:58, 8 July 2018

Package QFP100R
Manufacturer
First use 1995 ?
Used on MV1B ...

Chip found on late MVS boards and next to the DIP switches on ROM-Only boards.

Pinout


Edit this pinout

  • DIPRD0 and DIPRD1 go to a NEO-BUF chip to gate the remaining DIP switch bits and RTC inputs
  • Pin 85 might be an input
  • No memory card control signals ?