NEO-SDR-T: Difference between revisions
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[[File:neo-sdr-t.jpg|thumb]] | [[File:neo-sdr-t.jpg|thumb]] | ||
Chip found on MV1B and MV1C [[MVS hardware|slots]]. Handles [[Z80]] subsystem address and port decoding, Z80/68K communication latches and interrupt generation, similarly to [[NEO-D0]]. Handles | Chip found on MV1B and MV1C [[MVS hardware|slots]]. Handles [[Z80]] subsystem address and port decoding, Z80/68K communication latches and interrupt generation, similarly to [[NEO-D0]]. Handles controller I/Os as well. | ||
Draft pinout: [[File:neo-sdr.odg]] | Draft pinout: [[File:neo-sdr.odg]] | ||
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== Pinout == | == Pinout == | ||
[[File:Neo-sdr_pinout.png]] | |||
[[Category:Chips]] | [[Category:Chips]] | ||
Revision as of 13:52, 23 June 2016
Chip found on MV1B and MV1C slots. Handles Z80 subsystem address and port decoding, Z80/68K communication latches and interrupt generation, similarly to NEO-D0. Handles controller I/Os as well.
Draft pinout: File:Neo-sdr.odg
