NEO-ZMC

NEO-ZMC chip on a MVS cartridge. Picture courtesy of [MVS-Scans].

Z80 memory controller. Has a hardwired 32KiB bank and switchable 16/8/4/2KiB banks arranged as a register file. To save pins the high address lines (A15-A8) are used for data input. The chip's write strobe is (port) address decoded inside the console.

Pinout

File:Neo-zmc pinout.png

OpenOffice Draw file: File:Neo-zmc.odg

Operation

SDA10,SDA9,SDA8 are the bank selector and SDA1,SDA0 is the bank size selector

SDA1,SDA0 = 0,0 select bank ranges of 2Kbytes (64k M1)

SDA1,SDA0 = 0,1 select bank ranges of 4Kbytes (128k M1)

SDA1,SDA0 = 1,0 select bank ranges of 8Kbytes (256k M1)

SDA1,SDA0 = 1,1 select bank ranges of 16Kbytes (512k M1)

SDRD0 is the memory operation selector WRITE (set bank and range size) / READ (access M1 based in previous configuration)

Details:

We must put SDRD0 is in high logic level before configure any bank;

To configure a bank to be accessed (e.g. bank0):

Set SDRD0 from H to L (prepare for new bank configuration, let output in tri-state and accept inputs)

Set SDA[15..0] = $8003 (select bank 0 and 16k range size)

Set SDRD0 from L to H (fix bank, and ready to convert inputs in proper outputs signals)

With SDRD0 in H, send inputs SDA[15..0] from $8000~BFFF, ZMC will convert this range in M1 range from $00000~$03FFF;

Set SDRD0 from H to L (prepare for new bank configuration, let output in tri-state and accept inputs)

Set SDA[15..0] = $8103 (select bank 0 and 16k range size)

Set SDRD0 from L to H (fix bank, and ready to convert inputs in proper outputs signals)

With SDRD0 in H, send inputs SDA[15..0] from $8000~BFFF, ZMC will convert this range in M1 range from $04000~$07FFF;

Set SDRD0 from H to L (prepare for new bank configuration, let output in tri-state and accept inputs)

Set SDA[15..0] = $8203 (select bank 0 and 16k range size)

Set SDRD0 from L to H (fix bank, and ready to convert inputs in proper outputs signals)

With SDRD0 in H, send inputs SDA[15..0] from $8000~BFFF, ZMC will convert this range in M1 range from $08000~$0BFFF;

Set SDRD0 from H to L (prepare for new bank configuration, let output in tri-state and accept inputs)

Set SDA[15..0] = $8303 (select bank 0 and 16k range size)

Set SDRD0 from L to H (fix bank, and ready to convert inputs in proper outputs signals)

With SDRD0 in H, send inputs SDA[15..0] from $8000~BFFF, ZMC will convert this range in M1 range from $0C000~$0FFFF;

... and so on...

Here is the table for the banks of 512k rom
8003 => bank 00 (acess 00000‐03FFF )
8103 => bank 01 (acess 04000‐07FFF )
8203 => bank 02 (acess 08000‐0BFFF )
8303 => bank 03 (acess 0C000‐0FFFF )
8403 => bank 04 (acess 10000‐13FFF )
8503 => bank 05 (acess 14000‐17FFF )
8603 => bank 06 (acess 18000‐1BFFF )
8703 => bank 07 (acess 1C000‐1FFFF )
8803 => bank 08 (acess 20000‐23FFF )
8903 => bank 09 (acess 24000‐27FFF )
8A03 => bank 10 (acess 28000‐2BFFF )
8B03 => bank 11 (acess 2C000‐2FFFF )
8C03 => bank 12 (acess 30000‐33FFF )
8D03 => bank 13 (acess 34000‐37FFF )
8E03 => bank 14 (acess 38000‐3BFFF )
8F03 => bank 15 (acess 3C000‐3FFFF )
9003 => bank 16 (acess 40000‐43FFF )
9103 => bank 17 (acess 40000‐47FFF )
9203 => bank 18 (acess 40000‐4BFFF )
9303 => bank 19 (acess 40000‐4FFFF )
9403 => bank 20 (acess 50000‐53FFF )
9503 => bank 21 (acess 54000‐57FFF )
9603 => bank 22 (acess 58000‐5BFFF )
9703 => bank 23 (acess 5C000‐5FFFF )
9803 => bank 24 (acess 60000‐63FFF )
9903 => bank 25 (acess 64000‐67FFF )
9A03 => bank 26 (acess 68000‐6BFFF )
9B03 => bank 27 (acess 6C000‐6FFFF )
9C03 => bank 28 (acess 70000‐73FFF )
9D03 => bank 29 (acess 74000‐77FFF )
9E03 => bank 30 (acess 78000‐7BFFF )
9F03 => bank 31 (acess 7C000‐7FFFF )