VRAM: Difference between revisions

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The NeoGeo has 68KiB (physically 64KiB + 4KiB) of VRAM organised as 16 bits words, which is used to store [[Sprites|sprite]] attributes and the map for the [[fix layer]]. Contrary to other systems, the VRAM here '''does not contain actual graphics'''.
The NeoGeo has 68KiB (physically 64KiB + 4KiB) of VRAM organised as 16 bits words, which is used to store [[Sprites|sprite]] attributes and the map for the [[fix layer]]. Contrary to other systems, the VRAM here '''does not contain actual graphics'''.


It isn't mapped in the [[68k]]'s address space. The only way to read and write to it is by using 3 [[Memory mapped registers]]. Every address points to a word, not a byte.
It isn't mapped in the [[68k]]'s address space. The only way to read and write to it is by using 3 [[Memory mapped registers]] as i/o ports. Every address points to a word in VRAM, not a byte.


* VRAM_ADDR ($3C0000) sets the VRAM address
* VRAM_ADDR ($3C0000) sets the VRAM address for the next read/write operation
* VRAM_RW ($3C0002) is the data to read or write
* VRAM_RW ($3C0002) is the data read or to write
* VRAM_MOD ($3C0004) is the signed value added to the VRAM address after a write
* VRAM_MOD ($3C0004) is the signed value added to the VRAM address after a write
SNK specifies that the address register should be set directly instead of using auto-incrementation when changing between VRAM zones ($0000~$7FFF and $8000~$FFFF).


== Memory map ==
== Memory map ==
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|$8600
|$8600
|?
|?
|Dual sprite display lists
|Dual sprite display lists (used by the [[GPU]] but modifiable by the user)
|}
|}


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== Timing considerations ==
== Timing considerations ==
After a write:
*Another write should be made after at least 12 cycles.
*An address change should be made after at least 16 cycles.
After an address change, reads should be made after at least 16 cycles.
Note that these timings only affect the VRAM accesses, and not the LSPC registers.


[[Category:Video system]]
[[Category:Video system]]

Revision as of 16:03, 27 June 2011

VRAM stand for Video RAM.

File:Aes cxk5814.jpg
One of two CXK5814 2KiB RAM chips used for the upper zone of the VRAM ($8000~$87FF) on a AES system

The NeoGeo has 68KiB (physically 64KiB + 4KiB) of VRAM organised as 16 bits words, which is used to store sprite attributes and the map for the fix layer. Contrary to other systems, the VRAM here does not contain actual graphics.

It isn't mapped in the 68k's address space. The only way to read and write to it is by using 3 Memory mapped registers as i/o ports. Every address points to a word in VRAM, not a byte.

  • VRAM_ADDR ($3C0000) sets the VRAM address for the next read/write operation
  • VRAM_RW ($3C0002) is the data read or to write
  • VRAM_MOD ($3C0004) is the signed value added to the VRAM address after a write

SNK specifies that the address register should be set directly instead of using auto-incrementation when changing between VRAM zones ($0000~$7FFF and $8000~$FFFF).

Memory map

Start End Description
$0000 $6FFF SCB1
$7000 $7FFF Fix map
$8000 $81FF SCB2
$8200 $8400 SCB3
$8400 $8600 SCB4
$8600 ? Dual sprite display lists (used by the GPU but modifiable by the user)

VRAM can be modified at any time, even during active display.

Timing considerations

After a write:

  • Another write should be made after at least 12 cycles.
  • An address change should be made after at least 16 cycles.

After an address change, reads should be made after at least 16 cycles.

Note that these timings only affect the VRAM accesses, and not the LSPC registers.