Video DAC: Difference between revisions

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(Added a note to the schematic and corrected the 74ls06 reference)
 
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[[File:mvs_viddac.jpg|right|thumb|Resistor array forming the video DAC on a 1FZS.]]
[[File:mvs_viddac.jpg|right|thumb|Resistor array forming the video DAC on a [[MV1FZS]].]]


The NeoGeo uses a discrete video DAC made of resistors and two 74LS273 latches which store the color value from the [[palette RAM]] while the pixel has to be displayed. This is controlled by either [[NEO-B1]], [[NEO-GRC]] or [[NEO-GRZ]].
The NeoGeo uses a discrete video '''D'''igital-to-'''A'''nalog '''C'''onverter made of resistors fed by two [[74LS273|74LS273]] latches which store the color value from the [[palette RAM]] and [[74LS05|74LS05]] inverters. This is controlled by either {{Chipname|NEO-B1}}, {{Chipname|NEO-GRC}} or {{Chipname|NEO-GRZ}}.


[[File:aes_viddac.png|right|thumb|Video DAC on a AES board.]]
[[File:aes_viddac.png|right|thumb|Video DAC on a AES board.]]
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[[File:aes_viddac_schematic.png]]
[[File:aes_viddac_schematic.png]]


Each color component has its own set of 7 resistors. 6 of them are used with the actual color value (5 + 1 [[Palettes|common bit]]). The last (SHADOW signal) is related to the {{Reg|REG_SHADOW}} and {{Reg|REG_NOSHADOW}} registers (74HC259 latch).
Note: The schematic has a typo and shows a 74LS06 instead of [[74LS05|74LS05]] but both can be used.


The output voltage is then divided by 5 to obtain a 1Vp-p max signal, which can be fed to the [[CXA1145]] encoder.
Each color component has its own set of 7 resistors. 6 of them are used for the actual color value (5 + 1 [[Colors|common bit]]). The last (SHADOW signal) is related to the {{Reg|REG_SHADOW}} and {{Reg|REG_NOSHADOW}} registers ([[system latch]]).
 
==Arcade==
 
The output isn't lowered like on the AES. It goes straight to the [[JAMMA connector pinout|JAMMA edge]] as a 0~3.5V signal for the high-impedance inputs on arcade monitors.
 
==Home==
 
The output is divided by 2200 / (6800 + 2200) = 4.1 to obtain a ~0.9Vp-p max signal, which feeds the [[video encoder]] for amplification and conversion to composite.


[[Category:Chips]]
[[Category:Chips]]
[[Category:Video system]]
[[Category:Video system]]

Latest revision as of 23:14, 16 May 2020

File:Mvs viddac.jpg
Resistor array forming the video DAC on a MV1FZS.

The NeoGeo uses a discrete video Digital-to-Analog Converter made of resistors fed by two 74LS273 latches which store the color value from the palette RAM and 74LS05 inverters. This is controlled by either NEO-B1, NEO-GRC or NEO-GRZ.

File:Aes viddac.png
Video DAC on a AES board.

File:Aes viddac schematic.png

Note: The schematic has a typo and shows a 74LS06 instead of 74LS05 but both can be used.

Each color component has its own set of 7 resistors. 6 of them are used for the actual color value (5 + 1 common bit). The last (SHADOW signal) is related to the REG_SHADOW and REG_NOSHADOW registers (system latch).

Arcade

The output isn't lowered like on the AES. It goes straight to the JAMMA edge as a 0~3.5V signal for the high-impedance inputs on arcade monitors.

Home

The output is divided by 2200 / (6800 + 2200) = 4.1 to obtain a ~0.9Vp-p max signal, which feeds the video encoder for amplification and conversion to composite.