Latest revision as of 18:31, 17 January 2024

NEO-ZMC and PRO-CT0 in one package.

Can address up to 4MiB of M1 ROM.

Found in second revision MVS boards (for the PRO-CT0 logic only), and AES cartridges.

Pinout

NEO-ZMC part:

PRO-CT0 part, inputs:

12M: 12MHz clock, outputs next pixel on falling edge.
C0~C31: C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
H: When high, reverse bit order of pixels shifted out (used for sprites horizontal flipping)
EVEN: Swap A/B pixels.
LOAD: Latch C ROM data on rising edge of 12M.

Outputs:

@@ Line 1: / Line 1: @@
-[[File:mvs_zmc2.jpg|right|thumb|NEO-ZMC2 chip found on a 1FZS MVS board.]]
+{{ChipInfo
+|picture=mvs_zmc2.jpg
+|pkg=QFP80R
+|manu=fujitsu
+|date=1994 ?
+|gates=
+|used_on={{PCB|MV1FZS}} [[Cartridges]]...
+}}
-[[NEO-ZMC]] and [[PRO-CT0]] in one package. The PRO-CT0 is a network of shift registers and multiplexers (32-bit [[C ROM]] bus to two 4 bpp pixel outputs).
+{{Chipname|NEO-ZMC}} and {{Chipname|PRO-CT0}} in one package.
-Found in second revision MVS boards (for the PRO-CT0 logic only) and AES carts.
+Can address up to 4MiB of [[M1 ROM]].
+Found in second revision [[MVS hardware|MVS]] boards (for the PRO-CT0 logic only), and AES cartridges.
+=Pinout=
+{{Pinout|NEO-ZMC2|640px}}
+NEO-ZMC part:
+*SDA0,SDA1,SDA8~SDA15: [[Z80]] address bus
+*MA11~MA21: M ROM address outputs
+PRO-CT0 part, inputs:
+*12M: 12MHz clock, outputs next pixel on falling edge.
+*C0~C31: C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
+*H: When high, reverse bit order of pixels shifted out (used for [[sprites]] horizontal flipping)
+*EVEN: Swap A/B pixels.
+*LOAD: Latch C ROM data on rising edge of 12M.
+Outputs:
+*DOTA: High when pixel A is opaque (color > 0)
+*DOTB: High when pixel B is opaque (color > 0)
+*GAD0~GAD3: Pixel A color index
+*GBD0~GBD3: Pixel B color index
 [[Category:Chips]]