NEO-GRZ: Difference between revisions
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[[File:brd_grz.jpg|thumb|NEO-GRZ chip. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]] | [[File:brd_grz.jpg|thumb|NEO-GRZ chip. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]] | ||
Very late ( | Very late (last ?) revision of the [[NEO-GRC2]] chip, used on the [[MV1C]], [[CDZ]] and [[ROM-Only boards|ROM-only arcade boards]]. | ||
Integrates the video logic, fast VRAM, palette RAM, the line buffers and the [[L0 ROM]] in one chip. Slow VRAM is still external. | |||
Palette RAM and video RAM errors above $8000 are generally bad news. | |||
Uses a 3.3V power supply for its core, 5V for i/o. | |||
[[Category:Chips]] | [[Category:Chips]] | ||
Latest revision as of 10:11, 14 October 2018
Very late (last ?) revision of the NEO-GRC2 chip, used on the MV1C, CDZ and ROM-only arcade boards.
Integrates the video logic, fast VRAM, palette RAM, the line buffers and the L0 ROM in one chip. Slow VRAM is still external.
Palette RAM and video RAM errors above $8000 are generally bad news.
Uses a 3.3V power supply for its core, 5V for i/o.