NEO-273: Difference between revisions
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[[File:crt_273.jpg|right|thumb|NEO-273 chip in a MVS [[cartridges|cartridge]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]] | [[File:crt_273.jpg|right|thumb|NEO-273 chip in a MVS [[cartridges|cartridge]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]] | ||
This chip is used in cartridges to replace 74LS273 and 74LS174 latches that were used in early boards (Like on [[CHA board|CHA-32]]). | |||
It includes one 16-bit latch (to address a 128KiB [[S ROM]]) and one 20-bit latch (to address 8MiB of [[C ROM]]s) in one package. Note that A4 of the C ROMs and A3 of the S ROM are not part of the multiplexed bus and come straight from the cartridge edge, bypassing this chip. | |||
It was later replaced by [[NEO-CMC]] which performs the same function along with quite a few other things. | |||
For cartridges that use this chip but have more than 8MiB of C ROM, extra bits were added using 7400 chips. An added LS74 (2 bits) in CHA256 boards for example increases the C ROM capacity from 8MiB to 32MiB (256M). | For cartridges that use this chip but have more than 8MiB of C ROM, extra bits were added using 7400 chips. An added LS74 (2 bits) in CHA256 boards for example increases the C ROM capacity from 8MiB to 32MiB (256M). | ||
==Demultiplexing== | |||
{|class="wikitable" | |||
!P BUS||P19||P18||P17||P16||P15||P14||P13||P12||P11||P10||P9||P8||P7||P6||P5||P4||P3||P2||P1||P0 | |||
|- | |||
|C address||A3||A2||A1||A0||A20||A19||A18||A17||A16||A15||A14||A13||A12||A11||A10||A9||A8||A7||A6||A5 | |||
|- | |||
|S address|| || || || ||A4||A2||A1||A0||A16||A15||A14||A13||A12||A11||A10||A9||A8||A7||A6||A5 | |||
|} | |||
=Pinout= | =Pinout= | ||
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OpenOffice Draw file: [[File:neo-273.odg]] | OpenOffice Draw file: [[File:neo-273.odg]] | ||
[[Category:Chips]] | [[Category:Chips]] |
Revision as of 22:58, 27 January 2012
This chip is used in cartridges to replace 74LS273 and 74LS174 latches that were used in early boards (Like on CHA-32).
It includes one 16-bit latch (to address a 128KiB S ROM) and one 20-bit latch (to address 8MiB of C ROMs) in one package. Note that A4 of the C ROMs and A3 of the S ROM are not part of the multiplexed bus and come straight from the cartridge edge, bypassing this chip.
It was later replaced by NEO-CMC which performs the same function along with quite a few other things.
For cartridges that use this chip but have more than 8MiB of C ROM, extra bits were added using 7400 chips. An added LS74 (2 bits) in CHA256 boards for example increases the C ROM capacity from 8MiB to 32MiB (256M).
Demultiplexing
P BUS | P19 | P18 | P17 | P16 | P15 | P14 | P13 | P12 | P11 | P10 | P9 | P8 | P7 | P6 | P5 | P4 | P3 | P2 | P1 | P0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
C address | A3 | A2 | A1 | A0 | A20 | A19 | A18 | A17 | A16 | A15 | A14 | A13 | A12 | A11 | A10 | A9 | A8 | A7 | A6 | A5 |
S address | A4 | A2 | A1 | A0 | A16 | A15 | A14 | A13 | A12 | A11 | A10 | A9 | A8 | A7 | A6 | A5 |
Pinout
OpenOffice Draw file: File:Neo-273.odg