YM2610 registers: Difference between revisions
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(ADPCM-B registers) |
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= ADPCM-B part = | = ADPCM-B part = | ||
{| class="regdef" | |||
|'''Address (Z80 port 4)''' | |||
|'''Data (Z80 port 5)''' | |||
| | |||
|- | |||
|$10 | |||
|{{8BitRegister|Start|1|-|2|Repeat|1|-|3|Reset|1|}} | |||
| | |||
|- | |||
|$11 | |||
|{{8BitRegister|L|1|R|1|-|6|}} | |||
| | |||
|- | |||
|$12 | |||
|{{8BitRegister|Sample's start address/256 LSB|8}} | |||
| | |||
|- | |||
|$13 | |||
|{{8BitRegister|Sample's start address/256 MSB|8}} | |||
| | |||
|- | |||
|$14 | |||
|{{8BitRegister|Sample's stop address/256 LSB|8}} | |||
| | |||
|- | |||
|$15 | |||
|{{8BitRegister|Sample's stop address/256 MSB|8}} | |||
| | |||
|- | |||
|$19 | |||
|{{8BitRegister|Delta-N (L)|8}} | |||
|rowspan="2"|Determines sample playback rate | |||
|- | |||
|$1A | |||
|{{8BitRegister|Delta-N (H)|8}} | |||
|- | |||
|$1B | |||
|{{8BitRegister|ADPCM-B channel volume|8}} | |||
| | |||
|- | |||
|$1C | |||
|{{8BitRegister|B|1|-|1|A5|1|A4|1|A3|1|A2|1|A1|1|A0|1|}} | |||
|ADPCM-A & B channels flag control | |||
|- | |||
|} | |||
*Datasheet states playback formula as F=[(Delta-N (H)+Delta-N (L)) / 256] x 55.5KHz (correct?) | |||
*Write to flag control to reset/mask channel end flags | |||
**Write 1 to reset and/or mask selected flag | |||
**Write 0 to unmask selected flag | |||
**Masking a flag will prevent it from being raised when a channel sample reach its end, this means you have to write 1, then 0 to clear a flag and keep it active. | |||
**Flags must be manually cleared, playing a new sample on the channel won't clear it. | |||
= Reading = | = Reading = | ||
Revision as of 15:28, 29 May 2012
SSG part
| Address (Z80 port 4) | Data (Z80 port 5) | |||||||||||||||||||
| $00 |
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Channel A | ||||||||||||||||||
| $01 |
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| $02 |
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Channel B | ||||||||||||||||||
| $03 |
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| $04 |
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Channel C | ||||||||||||||||||
| $05 |
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| $06 |
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Noise channel | ||||||||||||||||||
| $07 |
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| $08 |
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Channel A | ||||||||||||||||||
| $09 |
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Channel B | ||||||||||||||||||
| $0A |
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Channel C | ||||||||||||||||||
| $0B |
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| $0C |
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| $0D |
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See diagram. | ||||||||||||||||||
If 'Mode' = 1, the EG is used instead of the 4bit volume value. f = 8M / (Coarse*256 + Fine) ?
Timers
| Address (Z80 port 4) | Data (Z80 port 5) | ||||||||||||||||||
| $24 |
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| $25 |
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| $26 |
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| $27 |
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- TA = Timer A, TB = Timer B
- Timers will tick until they have reached zero, at which point an IRQ will be generated if enabled. Reading port $04 will show which timer caused it.
- The actual timer counter registers are not directly accessable. They can be reset to zero or initialised from load registers $24-$26
- Writing 0 to the load bits in register $27 will reset the timer counter registers to zero
- Writing 1 to the load bits will copy the respective timer load register to the timer counter. This only works when the timer is at zero.
- When a timer expires, it is automatically reloaded from the load registers and continues.
- Timer flag reset refers to the same flags that are read from port $04
- CSM mode is for automatic key on for operators on the second FM channel when timer A expires?
FM part
ADPCM-A part
'Dump' in register $00 is the key on/off bit. Write 0 to start playing specified channels and write 1 to stop playing.
| Address (Z80 port 6) | Data (Z80 port 7) | ||||||||||||||||||
| $00 |
| ||||||||||||||||||
| $01 |
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| $08~$0D (one for each channel) |
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| $10~$15 (one for each channel) |
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| $18~$1D (one for each channel) |
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| $20~$25 (one for each channel) |
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| $28~$2D (one for each channel) |
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ADPCM-B part
| Address (Z80 port 4) | Data (Z80 port 5) | |||||||||||||||||||
| $10 |
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| $11 |
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| $12 |
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| $13 |
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| $14 |
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| $15 |
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| $19 |
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Determines sample playback rate | ||||||||||||||||||
| $1A |
| |||||||||||||||||||
| $1B |
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| $1C |
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ADPCM-A & B channels flag control | ||||||||||||||||||
- Datasheet states playback formula as F=[(Delta-N (H)+Delta-N (L)) / 256] x 55.5KHz (correct?)
- Write to flag control to reset/mask channel end flags
- Write 1 to reset and/or mask selected flag
- Write 0 to unmask selected flag
- Masking a flag will prevent it from being raised when a channel sample reach its end, this means you have to write 1, then 0 to clear a flag and keep it active.
- Flags must be manually cleared, playing a new sample on the channel won't clear it.
Reading
The only writable registers that can also be read are from the SSG. All other ports and addresses return different data.
| Z80 port # | Data | Notes | ||||||||||||||||||
| $04 |
|
When a timer expires and IRQ is enabled for the timer, the respective bit is set | ||||||||||||||||||
| $05 |
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Attempting to read non-SSG registers will fail | ||||||||||||||||||
| $06 |
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When a channel has reached the end address and stops, the respective bit is set, unless masked | ||||||||||||||||||
| $07 | not implemented | Always returns $00 | ||||||||||||||||||