NEO-ZMC2: Difference between revisions
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*12M: 12MHz clock, outputs next pixel on falling edge. | *12M: 12MHz clock, outputs next pixel on falling edge. | ||
*C0~C31: C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line. | *C0~C31: C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line. | ||
*H: When high, reverse bit order of pixels shifted out (used for [[sprites]] horizontal flipping) | |||
*EVEN: Swap A/B pixels. | |||
*LOAD: Latch C ROM data (on rising edge ?). | *LOAD: Latch C ROM data (on rising edge ?). | ||
Outpus: | Outpus: | ||
*DOTA: High when pixel A is opaque (color > 0) | *DOTA: High when pixel A is opaque (color > 0) | ||
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*GAD0~GAD3: Pixel A color data | *GAD0~GAD3: Pixel A color data | ||
*GBD0~GBD3: Pixel B color data | *GBD0~GBD3: Pixel B color data | ||
[[Category:Chips]] | [[Category:Chips]] | ||
Revision as of 23:58, 27 June 2012
NEO-ZMC and PRO-CT0 in one package. The PRO-CT0 is a network of multiplexers (32-bit C ROM bus to two 4 bpp pixel outputs).
Found in second revision MVS boards (for the PRO-CT0 logic only) and AES carts.
Pinout
OpenOffice Draw file: File:Neo-zmc2.odg
NEO-ZMC part:
- A0,A1,A8~A15: Z80 address bus
- MA11~M21: M ROM address outputs (NEO-ZMC part)
"SORD0" = SDRD0
PRO-CT0 part, inputs:
- 12M: 12MHz clock, outputs next pixel on falling edge.
- C0~C31: C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
- H: When high, reverse bit order of pixels shifted out (used for sprites horizontal flipping)
- EVEN: Swap A/B pixels.
- LOAD: Latch C ROM data (on rising edge ?).
Outpus:
- DOTA: High when pixel A is opaque (color > 0)
- DOTB: High when pixel B is opaque (color > 0)
- GAD0~GAD3: Pixel A color data
- GBD0~GBD3: Pixel B color data