PAT file: Difference between revisions
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*Maximum file size: ? | *Maximum file size: ? | ||
*Type code: 5 | *Type code: 5 | ||
* | *Loaded into: [[68k]] program [[DRAM]]. Bios then decodes and patches into [[Z80]] RAM | ||
*Banks: | *Banks: 0 | ||
=Format= | =Format= | ||
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If third data word is 0x0000 both the third and forth patches are skipped. | If third data word is 0x0000 both the third and forth patches are skipped. | ||
When loading a PAT file (see [[Loading files]]) | When loading a PAT file (see [[Loading files]]) the bank number and destination address vars can be used to alter all data words that are patched. This function allows PCM data to be loaded into different regions of PCM RAM while still allowing the use of a single PAT file only. Code snippet from TOP-SP1 bios that handles this below. | ||
<syntaxhighlight> | <syntaxhighlight> | ||
C0BFAE MOVEQ #0x0,D0 <-- Clear D0 | C0BFAE MOVEQ #0x0,D0 <-- Clear D0 | ||
C0BFB0 MOVE.B (0x7EDB,A5),D0 <-- Bank number to D0 | C0BFB0 MOVE.B (0x7EDB,A5),D0 <-- Bank number byte to D0 | ||
C0BFB4 SWAP D0 <-- | C0BFB4 SWAP D0 <-- shift left 16 | ||
C0BFB6 LSL.L #4,D0 <-- shift left 4 | C0BFB6 LSL.L #4,D0 <-- shift left 4 | ||
C0BFB8 OR.L (0x7EF4,A5),D0 <-- 'Logical OR' Destination address to D0 | C0BFB8 OR.L (0x7EF4,A5),D0 <-- 'Logical OR 32bit' Destination address to D0 | ||
C0BFBC LSR.L #8,D0 <-- shift right 8 | C0BFBC LSR.L #8,D0 <-- shift right 8 | ||
C0BFBE MOVE.W D0,(0x7736,A5) <-- This word value added to all data words to be patched. | C0BFBE MOVE.W D0,(0x7736,A5) <-- This word value added to all data words to be patched. |
Revision as of 18:35, 9 November 2012
PAT files contain structured data to patch already loaded Z80 code. They're used to replace sound samples addresses originally loaded from Z80 files when different PCM files are used.
- Maximum file size: ?
- Type code: 5
- Loaded into: 68k program DRAM. Bios then decodes and patches into Z80 RAM
- Banks: 0
Format
Blocks of 5, 16bit values:
- Patch address (in bytes, all the $0000~$FFFF range seems to work)
- First data word is (/2), byteswapped and written to address
- Second data word is (/2)-1, byteswapped written to address+2
- Third (optional) data word is (/2), byteswapped and written to address+4
- Fourth (optional) data word is (/2)-1, byteswapped written to address+6
If third data word is 0x0000 both the third and forth patches are skipped. When loading a PAT file (see Loading files) the bank number and destination address vars can be used to alter all data words that are patched. This function allows PCM data to be loaded into different regions of PCM RAM while still allowing the use of a single PAT file only. Code snippet from TOP-SP1 bios that handles this below.
C0BFAE MOVEQ #0x0,D0 <-- Clear D0
C0BFB0 MOVE.B (0x7EDB,A5),D0 <-- Bank number byte to D0
C0BFB4 SWAP D0 <-- shift left 16
C0BFB6 LSL.L #4,D0 <-- shift left 4
C0BFB8 OR.L (0x7EF4,A5),D0 <-- 'Logical OR 32bit' Destination address to D0
C0BFBC LSR.L #8,D0 <-- shift right 8
C0BFBE MOVE.W D0,(0x7736,A5) <-- This word value added to all data words to be patched.