NEO-AES4-1 board: Difference between revisions
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Seems to be the sixth and latest board revision. Some (all?) units | Seems to be the sixth and latest board revision. | ||
Some (all ?) units appear to be heavily shielded with a metal cover and conductive coating on the plastic shell. | |||
Differences with previous revisions: | |||
* The power supply circuit was (finally) moved next to the power connector. | |||
* Most through-hole chips were replaced by their surface mount versions. | |||
* The PLCC version of the [[68k]] CPU was used. Also tiny Z80. | |||
* The [[System_ROM|SP1 ROM]] is an OTP part. | |||
* Resistor networks were added on bus lines, maybe as an attempt to reduce radiated noise. | |||
* TC9018P composite sync generator. | |||
* {{Sig|SYNC}}/NEW-SYNC jumper. | |||
* {{Sig|BNKB}}/RBNKB jumper. | |||
[[File:4-1.jpg]] | [[File:4-1.jpg]] |
Revision as of 11:29, 29 December 2018
Seems to be the sixth and latest board revision.
Some (all ?) units appear to be heavily shielded with a metal cover and conductive coating on the plastic shell.
Differences with previous revisions:
- The power supply circuit was (finally) moved next to the power connector.
- Most through-hole chips were replaced by their surface mount versions.
- The PLCC version of the 68k CPU was used. Also tiny Z80.
- The SP1 ROM is an OTP part.
- Resistor networks were added on bus lines, maybe as an attempt to reduce radiated noise.
- TC9018P composite sync generator.
- [[Signal names#{{{2}}}|SYNC]]/NEW-SYNC jumper.
- [[Signal names#{{{2}}}|BNKB]]/RBNKB jumper.