NEO-CMC: Difference between revisions
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[[File:Neocmc_7050_7042_pinout.png]] | [[File:Neocmc_7050_7042_pinout.png]] | ||
Notes: | |||
*C_e_D[0-15]: C1/C3/C5/C7 data bus | |||
*C_o_D[0-15]: C2/C4/C6/C8 data bus | |||
*CX A[0-21]: C1/C2/C3/C4/C5/C6/C7/C8 address bus | |||
*Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts | |||
*Pins 89 and 92 are short circuited in Cartridge board. | |||
[[Category:Chips]] | [[Category:Chips]] | ||
Revision as of 03:20, 2 December 2011
Most infos from [MAME:neocrypt.c]
C and (merged) S ROM banking and decryption chips found on CHA cartridge boards, in two (?) versions:
- "CMC42": 90G06CF7042
- "CMC50": 90G06CF7050 (can also be used to decrypt M1 ROMs)
Also found on ROM-only arcade boards, without the "NEO-CMC" marking.
Pinout
Notes:
- C_e_D[0-15]: C1/C3/C5/C7 data bus
- C_o_D[0-15]: C2/C4/C6/C8 data bus
- CX A[0-21]: C1/C2/C3/C4/C5/C6/C7/C8 address bus
- Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts
- Pins 89 and 92 are short circuited in Cartridge board.