PROG board: Difference between revisions
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Revision as of 20:16, 31 December 2011
Cartridge PCB which holds the P and V ROMs.
List from [MAME's source].
MVS
Name | Test | Max P ROM | Max V ROM |
---|---|---|---|
NPS-PRG1 | [[UPD4990], BR4090, PCM | ||
PROG-8MB | |||
PROG-EP | |||
PROG-G2 | PCM,SNK-9201 | 512*2(+/?)1024 | |
PROG-HERO | |||
PROG-NAM | |||
PROG16 | |||
PROG4096 | PCM | 2*512+1024+2048 | 3*2048 |
PROG4096B | |||
PROG42G | |||
PROG42G-1 | PCM | 128+1024 | 4*1024 |
PROG42G-COM | |||
PROG8M42 | |||
PROGBK1 | |||
PROGBK2 | |||
PROGBK2R | |||
PROGBK2S | |||
PROGBK3R | |||
PROGBK3S | |||
PROGEOP | |||
PROGGSC | |||
PROGLBA | |||
PROGTOP | |||
PROGV | |||
PROGMC2 | PCM | 8192 | 8192 |
NPS-PRG1
Neo Print cartridge. Has an UPD4990 and a BR4090 serial EEPROM.
PROG-8MB
PROG-EP
PROG-G2
PROG-HERO
PROG-NAM
PROG16
PROG4096
PROG4096B
PROG42G
PROG42G-1
PROG42G-COM
PROG8M42
PROGBK1
The only non-protected board that can bankswitch and use all V ROM space. Really common and very useful for homebrew stuff or converts.
P ROM
P1 can be 4Mbit, 8Mbit or 16Mbit (27C400/27C800/27C160).
- If P1 is 16Mbit then some jumper must be set (JB3? didn't look into it. see kof95) and P2 should be empty. First half of P1 is mapped to 0x200000-0x2FFFFF and second half is mapped to 0x000000-0x0FFFFFF.
- If P1 is 4Mbit or 8Mbit, then P2 can contain a bankswitched ROM (same type as P1 plus 27C322). P1 appears at 0x000000-0x0FFFFF. P2 banked rom appears in 0x200000-0x2FFFFF.
V ROM
V ROMs can be 8Mbit, 16Mbit or 32Mbit (27C800/27C160/27C322). Size of largest ROM is selected with a pair of jumpers and the other 4 should be left unconnected. 4Mbit can also be used but only if there is one ROM and only in the last used slot.
ROM size | Jumper A | Jumper B |
---|---|---|
8Mbit | JV1 | JV2 |
16Mbit | JV3 | JV4 |
32Mbit | JV5 | JV6 |
Pinouts
Bankswitching is done with the LS74. It's not needed if the game isn't banked. Any write to an odd 0x200000-0x2FFFFF address will set the bank.
Cart edge | LS74 | P2 |
---|---|---|
A5(68k D0) | 2(D1) | N/A |
A6(68k D1) | 12(D2) | N/A |
A28(PORTWEL) | 3(CLK1) | N/A |
A28(PORTWEL) | 11(CLK2) | N/A |
N/A | 5(Q1) | 42(A19) |
N/A | 9(Q2) | 32(A20) |
One of 4 V ROMs is enabled with a set of LS139 outputs. The pair of V ROM jumpers effectively choose a set of 2 NEO-PCM address outputs to input to the LS139.
Jumper | LS139 | V ROM |
---|---|---|
JV1 | 2(1A) | N/A |
JV2 | 3(1B) | N/A |
JV3 | 2(1A) | N/A |
JV4 | 3(1B) | N/A |
JV5 | 2(1A) | N/A |
JV6 | 3(1B) | N/A |
N/A | 4(1Y0) | V1 13(/OE) |
N/A | 5(1Y1) | V2 13(/OE) |
N/A | 6(1Y2) | V3 13(/OE) |
N/A | 7(1Y3) | V4 13(/OE) |
The LS08 is used to AND the two PORT /OE signals.
- 4x 1/2/4MiB V ROMs
- 1/2MiB P1 ROM
- 1/2/4MiB P2 ROM
- 2x 512KiB EP1/EP2 ROM
- NEO-PCM
- LS139,LS08,LS74
PROGBK2
Looks identical to PROGBK1 in terms of ROM layout but uses a NEO-PCM2 for encryption plus all other logic that was done with discrete chips on PROGBK1.
PROGBK2R
PROGBK2S
PROGBK3R
PROGBK3S
PROGEOP
PROGGSC
PROGLBA
PROGSM
PROGSS3
PROGSF1
PROGTOP
PROGV (Brezzasoft)
Same board manufacturer as SNK ?
- 42pin V1 and P1 ROMs (DIP or TSOP)
- 64KiB Battery-backed RAM (Mapped to $200000~?)
- External I/O port (8 ?)
- Room for 2x8DIP switchs