NEO-ZMC2: Difference between revisions

Revision as of 08:14, 20 January 2012

NEO-ZMC and PRO-CT0 in one package. The PRO-CT0 is a network of shift registers and multiplexers (32-bit C ROM bus to two 4 bpp pixel outputs).

Found in second revision MVS boards (for the PRO-CT0 logic only) and AES carts.

OpenOffice Draw file: File:Neo-zmc2.odg

NEO-ZMC part:

PRO-CT0 part:

12M: Input, 12MHz clock, outputs next pixel on falling edge
GAD0~GAD3: Outputs, pixel A color data
GBD0~GBD3: Outputs, pixel B color data
LOAD: Input, latch C ROM data (on rising edge ?)
C0~C31: Inputs, C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
H: Input, when high, reverse bit order of pixels (used for sprites horizontal flipping)
DOTA: Output, high when pixel A is opaque
DOTB: Output, high when pixel B is opaque

@@ Line 6: / Line 6: @@
 == Pinout ==
-Information provided by Channelmaniac.
 [[File:Neo-zmc2 pinout.png]]
@@ Line 12: / Line 11: @@
 OpenOffice Draw file: [[File:neo-zmc2.odg]]
-*A0,A1,A8~A15: [[Z80]] address bus (NEO-ZMC part)
+NEO-ZMC part:
-*MA11~M21: M ROM address outputs
+*A0,A1,A8~A15: [[Z80]] address bus
-*12M: 12MHz clock (from [[NEO-D0]])
+*MA11~M21: M ROM address outputs (NEO-ZMC part)
-*GAD0~GAD3: Pixel A color data
-*GBD0~GBD3: Pixel B color data
+PRO-CT0 part:
-*C0~C31: Cartridge connections to C ROMs
+*12M: Input, 12MHz clock, outputs next pixel on falling edge
-*H: Reverse bit order of pixels (sprite horizontal flip)
+*GAD0~GAD3: Outputs, pixel A color data
+*GBD0~GBD3: Outputs, pixel B color data
+*LOAD: Input, latch C ROM data (on rising edge ?)
+*C0~C31: Inputs, C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
+*H: Input, when high, reverse bit order of pixels (used for [[sprites]] horizontal flipping)
+*DOTA: Output, high when pixel A is opaque
+*DOTB: Output, high when pixel B is opaque
 [[Category:Chips]]