NEO-ZMC2: Difference between revisions
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*A0,A1,A8~A15: [[Z80]] address bus | *A0,A1,A8~A15: [[Z80]] address bus | ||
*MA11~M21: M ROM address outputs (NEO-ZMC part) | *MA11~M21: M ROM address outputs (NEO-ZMC part) | ||
"SORD0" = SDRD0 | |||
PRO-CT0 part: | PRO-CT0 part: | ||
Revision as of 22:02, 7 March 2012
NEO-ZMC and PRO-CT0 in one package. The PRO-CT0 is a network of shift registers and multiplexers (32-bit C ROM bus to two 4 bpp pixel outputs).
Found in second revision MVS boards (for the PRO-CT0 logic only) and AES carts.
Pinout
OpenOffice Draw file: File:Neo-zmc2.odg
NEO-ZMC part:
- A0,A1,A8~A15: Z80 address bus
- MA11~M21: M ROM address outputs (NEO-ZMC part)
"SORD0" = SDRD0
PRO-CT0 part:
- 12M: Input, 12MHz clock, outputs next pixel on falling edge
- GAD0~GAD3: Outputs, pixel A color data
- GBD0~GBD3: Outputs, pixel B color data
- LOAD: Input, latch C ROM data (on rising edge ?)
- C0~C31: Inputs, C ROM data bus (2*16 bits). Gives all the pixel data needed for a 8 pixel line.
- H: Input, when high, reverse bit order of pixels (used for sprites horizontal flipping)
- DOTA: Output, high when pixel A is opaque
- DOTB: Output, high when pixel B is opaque