NEO-CMC: Difference between revisions

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[[File:brd_cmcnoref.jpg|thumb|"CMC50"]]
[[File:brd_cmcnoref.jpg|thumb|"CMC50"]]


The most "basic" information published can be found at [[http://mamedev.org/source/src/mame/machine/neocrypt.c.html MAME:neocrypt.c]]
Late SNK ASIC used as protection, banking and latching chip on [[CHAFIO]] [[CHA board]]s.


The NEO-CMC Chip is a Asic (Application Specific Integrated Circuit).
Scrambling/decryption infos can be found in [[http://mamedev.org/source/src/mame/machine/neocrypt.c.html MAME:neocrypt.c]]
This device can be programmed only once. Usually it's time consuming to design a custom chip directly. Then, severals trials could be made using FPGA (Field Programmable Gate Array) that can be writen thousands times. The Asic could be considered a final step from this process after many trials been performed.


To get a intuition about costs related, please read this:
==Versions==
[[http://www.design-reuse.com/articles/9010/fpga-s-vs-asic-s.html FPGA vs ASICs production and design]]
This chip is a TC190G series Toshiba ASIC developed between 1990 and 1994.  
 
SNK planned to put protections to avoid Neo-Geo piracy using the NEO-CMC chip on the PCB '''NEO-MVS CHAFIO'''.
 
==Fix bankswitching==
Able to address max 512KiB of fix ROM (4 128KiB banks) ?
 
From MAME's bankswitching code for MotW:
 
The bank map for the screen (one bank per tile line "L", 0=<L<32) is in VRAM ?
 
If VRAM($7500+L) is set to $0200, VRAM($7580+L) must be $FF0b with b being the bank number (0~3) for this line ?
 
=The Chip=
This chip is a Toshiba asic TC190G series developed between 1990 and 1994.  
The evolution of this series can be found at [[http://www.toshiba-components.com/ASIC/Technology.html Toshiba Technology RoadMap]].
The evolution of this series can be found at [[http://www.toshiba-components.com/ASIC/Technology.html Toshiba Technology RoadMap]].


The series TC190G cannot be found in datasheets anymore, but in past years had these models:
The datasheet apparently can't be found anymore for any of the known types:
*TC190G06CF7008
*TC190G06CF7008
*TC1'''90G06CF7042'''
*TC1'''90G06CF7042'''
*TC1'''90G06CF7050'''
*TC1'''90G06CF7050'''
and others...
(probably others...)


Inside this chip, SNK put the following designs together:
SNK merged the following designs into this chip:
*NEO-ZMC
*NEO-ZMC
*NEO-273
*NEO-273
*New Scrambling system that interlaces M1 + (CX + S1) to decrypt all the Graphic Cartridge ROM data in real time.
*New scrambling system that interlaces M1 + (C* + S1) to decrypt all the graphics ROMs data in real time.
 
The first released NEO-MVS CHAFIO PCB came out with '''NEO-CMC42''' on the following cartridges:
{|
|'''CART ID'''
|'''TITLE NAME'''
|-
|070
|Zupapa
|-
|251
|King Of Fighters 99
|-
|252
|Ganryu
|-
|253
|Garou Mark Of the Wolves
|-
|254
|Strikers 1945
|-
|255
|Prehistoric Isle 2
|-
|256
|Metal Slug 3
|-
|259
|Bang Bead
|-
|260
|Nightmare in the Dark
|-
|261
|Sengoku 3
|-
|}


On this version only S1 and CRoms were encrypted and M1 remained unencrypted. Almost one year later, SNK decided release one more layer on the algorithm, this time also encrypting M1 on this mixer chip. Then came out the second model of NEO-MVS CHAFIO with '''NEO-CMC50''' on the following cartridges:
The first released NEO-MVS CHAFIO PCBs came out with the '''042''' version of NEO-CMC, on the following cartridges:
{|
*[[Zupapa!]]
|'''CART ID'''
*[[The King of Fighters '99 - Millennium Battle]]
|'''TITLE NAME'''
*[[Ganryu]]
|-  
*[[Garou - Mark of the Wolves]]
|008
*[[Strikers 1945 Plus]]
|Jockey Grand Prix
*[[Prehistoric Isle 2]]
|-  
*[[Metal Slug 3]]
|257
*[[Bang Bead]]
|King Of Figthers 2000
*[[Nightmare in the Dark]]
|-
*[[Sengoku 3]]
|262
|King Of Figthers 2001
|-
|263
|Metal Slug 4
|-
|264
|Rage of the Dragons
|-
|265
|King Of Fighters 2002
|-
|266
|Power Instinct - Matrimele
|-
|267
|Pochi to Nyaa
|-
|268
|Metal Slug 5
|-
|269
|SNK vs Capcom Chaos
|-
|270
|Samurai Showdown Zero / Samurai Showdown 5
|-
|271
|King of Fighters 2003
|-
|272
|Samurai Showdown Zero Special / Samurai Showdown 5 Special
|-
|}


Some peoples talk about Jockey Grand Prix not be a official game, but its a little complicated.
On this version only the [[S ROM|S1]] and [[C ROM]]s are encrypted and M1 remains unencrypted. Almost one year later, SNK decided to add one more layer, this time also encrypting M1. This new NEO-CMC chip had the '''050''' reference and was found in the following cartridges:
At least it's production was official, because they used the real and original encryption chip.
*[[Jockey Grand Prix]]
That encryption cannot be mocked so easily and only the Toshiba and SNK knew the encryption.
*[[The King of Fighters 2000]]
*[[The King of Fighters 2001]]
*[[Metal Slug 4]]
*[[Rage of the Dragons]]
*[[The King of Fighters 2002]]
*[[Matrimelee]]
*[[Pochi and Nyaa]]
*[[Metal Slug 5]]
*[[SNK vs. Capcom - SVC Chaos]]
*[[Samurai Shodown V]]
*[[The King of Fighters 2003]]
*[[Samurai Shodown V Special]]


Until today, nobody has released one card using this Asic on the underground market.
Until today, nobody has released a cloned chip on the underground market.
That explain soe past years from now the emulator had bad M1 dumps, until Andreas create a mathematical algorithm that can do the process in half way.
Half way because the real encryption and decryption is beyond two tables 256 bytes.


Explanation Later!
==Fix handling==


Neo-CMC only came out on this to models as listed above.
See [[fix bankswitching]].


==Encryption==


Todo.


=Pinout=
=Pinout=
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OpenOffice Draw file: [[File:Neocmc_7050_7042.odg]]
OpenOffice Draw file: [[File:Neocmc_7050_7042.odg]]
Notes:
 
*C_e_D[0..15]: C1/C3/C5/C7 data bus
Signals:
*C_o_D[0..15]: C2/C4/C6/C8 data bus
*C_e_D[0..15]: C odd data bus
*CX A[0..21]: C1/C2/C3/C4/C5/C6/C7/C8 address bus
*C_o_D[0..15]: C even data bus
*CX A[0..21]: C1~8 address bus
*Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts
*Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts
*Pins 89 and 92 are short circuited in Cartridge board.
*Pins 89 and 92 are shorted.
[[Category:Chips]]
[[Category:Chips]]

Revision as of 21:23, 24 December 2012

"CMC42" chip on a MVS cartridge. Picture courtesy of [MVS-Scans].
File:Brd cmcnoref.jpg
"CMC50"

Late SNK ASIC used as protection, banking and latching chip on CHAFIO CHA boards.

Scrambling/decryption infos can be found in [MAME:neocrypt.c]

Versions

This chip is a TC190G series Toshiba ASIC developed between 1990 and 1994. The evolution of this series can be found at [Toshiba Technology RoadMap].

The datasheet apparently can't be found anymore for any of the known types:

  • TC190G06CF7008
  • TC190G06CF7042
  • TC190G06CF7050

(probably others...)

SNK merged the following designs into this chip:

  • NEO-ZMC
  • NEO-273
  • New scrambling system that interlaces M1 + (C* + S1) to decrypt all the graphics ROMs data in real time.

The first released NEO-MVS CHAFIO PCBs came out with the 042 version of NEO-CMC, on the following cartridges:

On this version only the S1 and C ROMs are encrypted and M1 remains unencrypted. Almost one year later, SNK decided to add one more layer, this time also encrypting M1. This new NEO-CMC chip had the 050 reference and was found in the following cartridges:

Until today, nobody has released a cloned chip on the underground market.

Fix handling

See fix bankswitching.

Encryption

Todo.

Pinout

OpenOffice Draw file: File:Neocmc 7050 7042.odg

Signals:

  • C_e_D[0..15]: C odd data bus
  • C_o_D[0..15]: C even data bus
  • CX A[0..21]: C1~8 address bus
  • Pins 87,88 contains a RC circuit clock driver like in a 8085 with X1 and X2 pinouts
  • Pins 89 and 92 are shorted.
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