PCM: Difference between revisions
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PCM (not "'''NEO'''-PCM" for some reason) is a {{Chipname|V ROM}} banking and demultiplexing chip, found in AES and MVS [[cartridges]], and on [[ROM-Only boards|ROM-only]] arcade boards. | |||
Early cartridges had separate [[YM2610|ADPCM]]-A and ADPCM-B sound ROMs. Since one was often emptier than the other, SNK devised a way to mix both types in the same ROM chip to save space and reduce | Early cartridges had separate [[YM2610|ADPCM]]-A and ADPCM-B sound ROMs. Since one was often emptier than the other, SNK devised a way to mix both types in the same ROM chip to save space and reduce costs. | ||
{{Chipname|NEO-PCM2}} can also be found in late cartridges and with {{Chipname|NEO-YSA2}}. | {{Chipname|NEO-PCM2}} can also be found in late cartridges, and with {{Chipname|NEO-YSA2}}. | ||
On some [[:Category:cartridge boards|Cartridge boards]], VA20~VA22 | On some [[:Category:cartridge boards|Cartridge boards]], VA20~VA22 are used to select which of the 4 possible V ROMs to use (decoded by a LS139). | ||
Uses several latches for address and data, as well as a | Uses several latches for address and data, as well as a counter clocked by {{Sig|68KCLKB|68KCLKB}} for synchronisation. | ||
=Internal logic= | =Internal logic= | ||
The trick takes advantage of the asynchronous and predictable access to the ADPCM-A and APDCM-B | The trick takes advantage of the asynchronous and predictable access to the ADPCM-A and APDCM-B data by the {{Chipname|YM2610}}. See [[YM2610 bus timing]]. | ||
Verilog: to do. | Verilog: to do. | ||
Revision as of 00:59, 17 November 2016
| |
| Package | QFP80R |
| Manufacturer | 
|
| First use | 1992 ? |
| Used on | Cartridges |
PCM (not "NEO-PCM" for some reason) is a V ROM banking and demultiplexing chip, found in AES and MVS cartridges, and on ROM-only arcade boards.
Early cartridges had separate ADPCM-A and ADPCM-B sound ROMs. Since one was often emptier than the other, SNK devised a way to mix both types in the same ROM chip to save space and reduce costs.
NEO-PCM2 can also be found in late cartridges, and with NEO-YSA2.
On some Cartridge boards, VA20~VA22 are used to select which of the 4 possible V ROMs to use (decoded by a LS139).
Uses several latches for address and data, as well as a counter clocked by 68KCLKB for synchronisation.
Internal logic
The trick takes advantage of the asynchronous and predictable access to the ADPCM-A and APDCM-B data by the YM2610. See YM2610 bus timing.
Verilog: to do.
Pinout
OpenOffice Draw file: File:Pcm.odg
Has an inverter on pins 26 and 27.
- SDPOE, SDROE, SDPMPX, SDRMPX: from the YM2610.
- SDRAD0~SDRAD7: ADPCM-A multiplexed bus part
- SDPAD0~SDPAD7: ADPCM-B multiplexed bus part
- SDRA8, SDRA9, SDRA20~SDRA23: ADPCM-A address bus
- SDPA8~SDPA11: ADPCM-B address bus
- V D0~V D7: V ROM(s) data bus
- V A-1~V A22: V ROM(s) address bus