NEO-ZMC: Difference between revisions
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[[File:crt_zmc.jpg|right|thumb|NEO-ZMC chip on a MVS [[cartridges|cartridge]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]] | [[File:crt_zmc.jpg|right|thumb|NEO-ZMC chip on a MVS [[cartridges|cartridge]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]] | ||
Z80 memory controller. Has a hardwired 32KiB bank and switchable 16/8/4/2KiB banks. | Z80 memory controller. Has a hardwired 32KiB bank and switchable 16/8/4/2KiB banks arranged as a register file. To save pins the high address lines are used as the data input. The chip's write strobe is (port) address decoded inside the console. | ||
[[Category:Chips]] | [[Category:Chips]] | ||
Revision as of 00:08, 8 February 2011
Z80 memory controller. Has a hardwired 32KiB bank and switchable 16/8/4/2KiB banks arranged as a register file. To save pins the high address lines are used as the data input. The chip's write strobe is (port) address decoded inside the console.