NEO-AES4-1 board

From NeoGeo Development Wiki
Revision as of 11:29, 29 December 2018 by Furrtek (talk | contribs)
Jump to navigation Jump to search

Seems to be the sixth and latest board revision.

Some (all ?) units appear to be heavily shielded with a metal cover and conductive coating on the plastic shell.

Differences with previous revisions:

  • The power supply circuit was (finally) moved next to the power connector.
  • Most through-hole chips were replaced by their surface mount versions.
  • The PLCC version of the 68k CPU was used. Also tiny Z80.
  • The SP1 ROM is an OTP part.
  • Resistor networks were added on bus lines, maybe as an attempt to reduce radiated noise.
  • TC9018P composite sync generator.
  • SYNC/NEW-SYNC jumper.
  • BNKB/RBNKB jumper.

Retrieved from "https://wiki.neogeodev.org/index.php?title=NEO-AES4-1_board&oldid=6381"