P bus

The P bus is a 24-bit internal graphics data bus, connecting the video-related chips and the C and S ROM address latches in cartridges.

It carries multiplexed data, which is sequenced by LSPC in a precise and repetitive manner.

C and S ROM adresses are extracted in cartridges by NEO-273 or regular 273's thanks to the PCK1B and PCK2B signals.

Values

P BUS	P23	P22	P21	P20	P19	P18	P17	P16	P15	P14	P13	P12	P11	P10	P9	P8	P7	P6	P5	P4	P3	P2	P1	P0
NEO-B1 pin	TDI11	TDI10	TDI9	TDI8	TDI7	TDI6	TDI5	TDI4	P15	P14	P13	P12	P11	P10	P9	P8	TA7	TA6	TA5	TA4	TA3	TA2	TA1	TA0
LO address									A15	A14	A13	A12	A11	A10	A9	A8	A7	A6	A5	A4	A3	A2	A1	A0
									Table # (shrink value)								Index in table (line)
LO data	D7	D6	D5	D4	D3	D2	D1	D0
	Tilemap index				Tile line
FIX palette					D3	D2	D1	D0
SPR palette	D7	D6	D5	D4	D3	D2	D1	D0
X position									For even buffer								For odd buffer
C address	A24	A23	A22	A21	A3	A2	A1	A0	A20	A19	A18	A17	A16	A15	A14	A13	A12	A11	A10	A9	A8	A7	A6	A5
	Tile number				8-Pixel line #				Tile number
S address									A4	A2	A1	A0	A16	A15	A14	A13	A12	A11	A10	A9	A8	A7	A6	A5
									Half	8-Pixel line #			Tile number

Note that C A4 (CA4) and S A3 (2H1) are separate signals.

Also note that the X sprite position is only 8 bit since the line buffers are odd/even interleaved. LSPC outputs 2 different latch signals.