Latest revision as of 01:58, 8 July 2018

Chip found on late MVS boards and next to the DIP switches on ROM-Only boards.

Pinout

DIPRD0 and DIPRD1 go to a NEO-BUF chip to gate the remaining DIP switch bits and RTC inputs
Pin 85 might be an input
No memory card control signals ?

@@ Line 1: / Line 1: @@
-[[File:neo-dcr-t.jpg|thumb|NEO-DCR-T on a [[ROM-Only boards|ROM-only arcade board]]. Picture courtesy of [[http://www.mvs-scans.com MVS-Scans]].]]
+{{ChipInfo
+|picture=neo-dcr-t.jpg
+|pkg=QFP100R
+|manu=toshiba
+|date=1995 ?
+|gates=
+|used_on={{PCB|MV1B}} ...
+}}
-Chip found on MV1B, MV1C [[MVS hardware|slots]] and next to the [[Hardware DIPs|DIP switches]] on [[ROM-Only boards]].
+Chip found on late [[MVS hardware|MVS]] boards and next to the [[Hardware DIPs|DIP switches]] on [[ROM-Only boards]].
+* Address decoding
+* Coin I/O
+* [[Memory_mapped_registers#System_registers|System register]]
+* [[Wait cycle]] generator
+=Pinout=
+{{Pinout|NEO-DCR|900}}
+* DIPRD0 and DIPRD1 go to a {{Chipname|NEO-BUF}} chip to gate the remaining DIP switch bits and RTC inputs
+* Pin 85 might be an input
+* No [[memory card]] control signals ?
 [[Category:Chips]]