A wait cycle is a 68k bus cycle with no effects, the purpose of it is to allow the use of slow memories by "waiting" for them.
The NeoGeo provides wait state generation for 3 memory zones:
- 000000~0FFFFF: P ROM - Configurable, 0 or 1 cycle
- 200000~2FFFFF: P ROM - Configurable, 0, 1 or more cycles
- 800000~BFFFFF: Memory card - Fixed, 2 cycles
Configuration is done by setting levels of the following cartridge pins:
- ROMWAIT for 1 cycle in 000000~0FFFFF
- PWAIT0 for 1 cycle in 200000~2FFFFF ?
- PWAIT1 to enable PDTACK as a DTACK for 200000~2FFFFF ?