Graphic glitches: Difference between revisions

From NeoGeo Development Wiki
Jump to navigation Jump to search
mNo edit summary
(Links)
 
(16 intermediate revisions by 2 users not shown)
Line 1: Line 1:
This is supposed to be a repair guide that doesn't need much technical knowledge on the GFX hardware to understand. Only cart systems are covered here. Pics are provided for all glitches described and can be used to compare glitches that show up on faulty hardware for help in repairs.
This is supposed to be a repair guide that doesn't need much technical knowledge on the graphics hardware to understand. Only cart systems are covered here. Pics are provided for all glitches described and can be used to compare with what shows up on faulty hardware.


=Color problems=


todo: maybe add more detail, get rest of pics/descriptions up
See [[palette RAM]], [[video DAC]], DAC latches, palette address output from NEO-B1 or palette access decode...
..don't have any LSPC-A0 info to work with so only LSPC2 is included for now
 
=LO ROM=
 
A dead [[LO ROM]] or its associated buffer can cause sprite rows to be replicated along their height. The [[fix layer]] (most text) isn't affected.
 
<gallery heights=224px widths=320px>
File:Aof2_bad_lo1.png|How the [[eyecatcher]] might look like (simulated).
File:Aof2_bad_lo2.png|Art of Fighting 2's character select screen (simulated).
File:Bad_lo3.jpg|Actual output of a system with the defect.
</gallery>
 
Thanks to GadgetUK164 for the info.


=C ROM=
=C ROM=
All sprites come from the [[C ROM]]s. Most graphics on screen are [[sprites]] as the Neo has no dedicated scrolling background layers like other systems. If it moves, scales or appears to be part of a background then assume it's a sprite.


==C ROM address==
==C ROM address==
Line 13: Line 27:
C ROM address lines follow this path:
C ROM address lines follow this path:


* LSPC2/LSPC-A0 to CHA slot (on multislots it will go through some buffers in between)
* LSPC2/LSPC-A0 to CHA slot (on multislots it will go through some buffers in between, [[NEO-257]]s or others)
* CHA slot to 74273 or similar(on oldest games)/NEO-273(on most games)/NEO-CMC(on newest games)
* CHA slot to 74273 or similar(on oldest games)/NEO-273(on most games)/NEO-CMC(on newest games)
* 273/CMC to C ROM address lines
* 273/CMC to C ROM address lines


See [[pinouts]] for the slot pin numbers of the P0~23/CA4 signals listed in the table.
See [[pinouts]] for the slot pin numbers of the P0~23/CA4 signals listed in the table.
The two kind of glitches caused by the first 5 address lines and the upper ones is because of the way the [[sprite graphics format|sprites are drawn]].


===Lower address lines===
===Lower address lines===
Line 27: Line 43:
! scope="col" | Sample
! scope="col" | Sample
! scope="col" | Address
! scope="col" | Address
! scope="col" | LSPC2&nbsp;out
! scope="col" | LSPC2-A2&nbsp;out
! scope="col" | LSPC-A0&nbsp;out
! scope="col" | NEO&#8209;273&nbsp;in
! scope="col" | NEO&#8209;273&nbsp;in
! scope="col" | NEO&#8209;273&nbsp;out
! scope="col" | NEO&#8209;273&nbsp;out
Line 36: Line 53:
|A0
|A0
|P16(134)
|P16(134)
|P16(98)
|P16(57)
|P16(57)
|C_A0(64)
|C_A0(64)
Line 44: Line 62:
|A1
|A1
|P17(135)
|P17(135)
|P17(102)
|P17(59)
|P17(59)
|C_A1(1)
|C_A1(1)
Line 52: Line 71:
|A2
|A2
|P18(136)
|P18(136)
|P18(103)
|P18(25)
|P18(25)
|C_A2(32)
|C_A2(32)
Line 60: Line 80:
|A3
|A3
|P19(137)
|P19(137)
|P19(104)
|P19(27)
|P19(27)
|C_A3(33)
|C_A3(33)
Line 68: Line 89:
|A4
|A4
|CA4(102)
|CA4(102)
|CA4(125)
|N/A
|N/A
|N/A
|N/A
|A4(6)
|A4(6)
|Sets of 8 columns are mirrored. Note NEO-273 isn't used and CA4 on CHA connector goes straight to C ROM A3.
|Sets of 8 columns are mirrored. Note [[NEO-273]] isn't used and CA4 on CHA connector goes straight to C ROM A4.
|}
|}


===Higher address lines===
===Higher address lines===


[[File:C_A12.png|thumb|right|120px|A12 stuck high. Ryo in the bottom right is fine but everything else has the wrong sprites displayed.]]
[[File:C_A12.png|thumb|A12 stuck high. Ryo in the bottom right is fine but everything else has the wrong sprites displayed.]]


Higher address lines can cause the 16x16 blocks of sprite graphics to appear without glitches but in completely wrong places. C ROM address A5 upwards can cause this. The patterns aren't obvious like they are for lower address lines so it's not as easy to diagnose. The sample pic to the right shows an example. Graphics from different stages, characters etc. can show up correctly but are misplaced.
Higher address lines can cause the 16x16 blocks of sprite graphics to appear without glitches but in completely wrong places.
 
C ROM address A5 upwards can cause this. The patterns aren't obvious like they are for lower address lines so it's not as easy to diagnose. Graphics from different stages, characters etc. can show up correctly but are misplaced.
 
<br clear=all>


==C ROM data==
==C ROM data==


jailbars..
Cut or stuck C ROM data lines create vertical lines '''which move with sprites'''. Health bars and text (S ROM graphics) are fine.
 
[[File:Kof2k_cglitch.gif]]


=S ROM=
=S ROM=
Graphics from the S ROM are used for stationary life bars, credit counters, on screen text and other graphics that don't need to move around. In the reference image, S ROM graphics are used for:
* "SELECT ENEMY"
* "TIME" and "5"
* "COM"
* "LEVEL-4" and "CREDIT 00"
They can't scroll or scale and they always appear on top of all sprites. This can cause S ROM issues to completely cover the screen.


==S ROM address==
==S ROM address==
S ROM address lines follow the same path as [[Graphic_glitches#C ROM address|C ROM address lines]]. 16 lines are shared with sprites and a single bad trace can affect both depending on what part of the path is affected. The NEO-273 (or whatever else is used) outputs separate S ROM/C ROM addresses from the shared address bus.


===Lower address lines===
===Lower address lines===


...
Certain patterns appear for bad lower address lines like they do for C ROMs.


{| class="wikitable"
{| class="wikitable"
Line 96: Line 134:
! scope="col" | Sample
! scope="col" | Sample
! scope="col" | Address
! scope="col" | Address
! scope="col" | LSPC2&nbsp;out
! scope="col" | LSPC2-A2&nbsp;out
! scope="col" | LSPC-A0&nbsp;out
! scope="col" | NEO&#8209;273&nbsp;in
! scope="col" | NEO&#8209;273&nbsp;in
! scope="col" | NEO&#8209;273&nbsp;out
! scope="col" | NEO&#8209;273&nbsp;out
Line 113: Line 152:
|A1
|A1
|P13(128)
|P13(128)
|P13(95)
|P13(53)
|P13(53)
|S_A1(49)
|S_A1(49)
Line 121: Line 161:
|A2
|A2
|P14(129)
|P14(129)
|P14(96)
|P14(54)
|P14(54)
|S_A2(50)
|S_A2(50)
Line 129: Line 170:
|A3
|A3
|2H1(107)
|2H1(107)
|2H1(124)
|N/A
|N/A
|N/A
|N/A
Line 137: Line 179:
|A4
|A4
|P15(130)
|P15(130)
|P15(97)
|P15(55)
|P15(55)
|S_A4(51)
|S_A4(51)
Line 145: Line 188:
==S ROM data==
==S ROM data==


jailbars..
[[File:S_D_0.png|thumb|right|S ROM D0 (FIXD0) stuck high which creates jailbars covering the whole screen]]
 
Data outputs from the [[S ROM]] go through [[Signals|FIXD0~FIXD7]] on the [[Pinouts|cart slot]].
 
If any one of these traces is bad then it can cause glitches that cover the entire screen. A single bad output can cause every odd (or even) column of pixels on screen to be obscured.
 
Sprites below can appear fine correctly if some columns aren't affected.
 
<br clear=all>
 
=Internal bus problems=
 
Glitches which:
* Produce the same color pixel in 2x2 pixel blocks (dotted pattern)
* Horizontally distort or misplace the sprites
Are caused by bad connections between video chips (LSPC2/B1...), not between the console and the cart.
 
<gallery heights=224px widths=320px>
File:Aof2_dots.png|Cut traces between LSPC2 and NEO-B1, or between LSPC and PRO-B0/PRO-C0 can produce this dotted pattern. Check the four WE lines. (simulated)
File:Glitch_linebuffer.jpg|If the dotted pattern doesn't cover the whole screen, either PRO-B0 or PRO-C0 may be dead. Picture by HPMAN.
</gallery>
 
Todo: fix isn't buffered so it shouldn't be affected by WE or CK lines cuts.
 
[[Category:Repairs]]

Latest revision as of 00:41, 12 November 2019

This is supposed to be a repair guide that doesn't need much technical knowledge on the graphics hardware to understand. Only cart systems are covered here. Pics are provided for all glitches described and can be used to compare with what shows up on faulty hardware.

Color problems

See palette RAM, video DAC, DAC latches, palette address output from NEO-B1 or palette access decode...

LO ROM

A dead LO ROM or its associated buffer can cause sprite rows to be replicated along their height. The fix layer (most text) isn't affected.

  • How the eyecatcher might look like (simulated).

    How the eyecatcher might look like (simulated).

  • Art of Fighting 2's character select screen (simulated).

    Art of Fighting 2's character select screen (simulated).

  • Actual output of a system with the defect.

    Actual output of a system with the defect.

Thanks to GadgetUK164 for the info.

C ROM

All sprites come from the C ROMs. Most graphics on screen are sprites as the Neo has no dedicated scrolling background layers like other systems. If it moves, scales or appears to be part of a background then assume it's a sprite.

C ROM address

Reference pic used in samples

C ROM address lines follow this path:

  • LSPC2/LSPC-A0 to CHA slot (on multislots it will go through some buffers in between, NEO-257s or others)
  • CHA slot to 74273 or similar(on oldest games)/NEO-273(on most games)/NEO-CMC(on newest games)
  • 273/CMC to C ROM address lines

See pinouts for the slot pin numbers of the P0~23/CA4 signals listed in the table.

The two kind of glitches caused by the first 5 address lines and the upper ones is because of the way the sprites are drawn.

Lower address lines

A stuck lower address line for C ROMs causes certain patterns with display glitches. The graphics appear to be selected correctly but are glitched in various ways. A bad trace in the path of pins listed in the table can cause the glitch shown in the sample pic.

Sample Address LSPC2-A2 out LSPC-A0 out NEO‑273 in NEO‑273 out C ROMs in Notes
A0 P16(134) P16(98) P16(57) C_A0(64) A0(10) 1 row of pixels mirrored. Sprites appear "pixelated" as if it's lower res.
A1 P17(135) P17(102) P17(59) C_A1(1) A1(9) Sets of 2 rows are mirrored.
A2 P18(136) P18(103) P18(25) C_A2(32) A2(8) Sets of 4 rows are mirrored.
A3 P19(137) P19(104) P19(27) C_A3(33) A3(7) Sets of 8 rows are mirrored.
A4 CA4(102) CA4(125) N/A N/A A4(6) Sets of 8 columns are mirrored. Note NEO-273 isn't used and CA4 on CHA connector goes straight to C ROM A4.

Higher address lines

A12 stuck high. Ryo in the bottom right is fine but everything else has the wrong sprites displayed.

Higher address lines can cause the 16x16 blocks of sprite graphics to appear without glitches but in completely wrong places.

C ROM address A5 upwards can cause this. The patterns aren't obvious like they are for lower address lines so it's not as easy to diagnose. Graphics from different stages, characters etc. can show up correctly but are misplaced.


C ROM data

Cut or stuck C ROM data lines create vertical lines which move with sprites. Health bars and text (S ROM graphics) are fine.

S ROM

Graphics from the S ROM are used for stationary life bars, credit counters, on screen text and other graphics that don't need to move around. In the reference image, S ROM graphics are used for:

  • "SELECT ENEMY"
  • "TIME" and "5"
  • "COM"
  • "LEVEL-4" and "CREDIT 00"

They can't scroll or scale and they always appear on top of all sprites. This can cause S ROM issues to completely cover the screen.

S ROM address

S ROM address lines follow the same path as C ROM address lines. 16 lines are shared with sprites and a single bad trace can affect both depending on what part of the path is affected. The NEO-273 (or whatever else is used) outputs separate S ROM/C ROM addresses from the shared address bus.

Lower address lines

Certain patterns appear for bad lower address lines like they do for C ROMs.

Sample Address LSPC2-A2 out LSPC-A0 out NEO‑273 in NEO‑273 out S ROM in Notes
A0 P12(126) P12(52) S_A0(48) A0(12) 1 row of pixels mirrored. Appears "pixelated".
A1 P13(128) P13(95) P13(53) S_A1(49) A1(11) Sets of 2 rows mirrored.
A2 P14(129) P14(96) P14(54) S_A2(50) A2(10) Sets of 4 rows mirrored.
A3 2H1(107) 2H1(124) N/A N/A A3(9) Sets of 2 columns mirrored. CHA 2H1 goes straight to A3 on S ROM.
A4 P15(130) P15(97) P15(55) S_A4(51) A4(8) Sets of 4 columns mirrored.

S ROM data

S ROM D0 (FIXD0) stuck high which creates jailbars covering the whole screen

Data outputs from the S ROM go through FIXD0~FIXD7 on the cart slot.

If any one of these traces is bad then it can cause glitches that cover the entire screen. A single bad output can cause every odd (or even) column of pixels on screen to be obscured.

Sprites below can appear fine correctly if some columns aren't affected.


Internal bus problems

Glitches which:

  • Produce the same color pixel in 2x2 pixel blocks (dotted pattern)
  • Horizontally distort or misplace the sprites

Are caused by bad connections between video chips (LSPC2/B1...), not between the console and the cart.

  • Cut traces between LSPC2 and NEO-B1, or between LSPC and PRO-B0/PRO-C0 can produce this dotted pattern. Check the four WE lines. (simulated)

    Cut traces between LSPC2 and NEO-B1, or between LSPC and PRO-B0/PRO-C0 can produce this dotted pattern. Check the four WE lines. (simulated)

  • If the dotted pattern doesn't cover the whole screen, either PRO-B0 or PRO-C0 may be dead. Picture by HPMAN.

    If the dotted pattern doesn't cover the whole screen, either PRO-B0 or PRO-C0 may be dead. Picture by HPMAN.

Todo: fix isn't buffered so it shouldn't be affected by WE or CK lines cuts.

Retrieved from "https://wiki.neogeodev.org/index.php?title=Graphic_glitches&oldid=6562"