NEO-D0: Difference between revisions

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*Clock divider
* Clock divider
*{{Chipname|Z80}} memory and [[Z80 port map|port]] control
* {{Chipname|Z80}} memory and [[Z80 port map|port]] control
*{{Chipname|YM2610}} interface
* {{Chipname|YM2610}} interface
*[[Memory card]] bank selection
* [[Memory card]] bank selection
*[[Joypad]] outputs
* [[Joypad]] outputs


Maybe similar to {{Chipname|NEO-SUD}} on the NeoGeo CD. Close to the audio hardware.
Maybe similar to {{Chipname|NEO-SUD}} on the NeoGeo CD. Close to the audio hardware.


=Pinout=
=Pinout=
[[File:Neo-d0_pinout.png]]


OpenOffice Draw file: [[File:neo-d0.odg]]
{{Pinout|NEO-D0|640}}
 
 
=Internal schematic=
 
[[File:Neo-d0_sd.png]]


=Signals=
=Signals=


*D0~D5: {{Chipname|68k}} data bus for joypad outputs
* {{Sig|D*|D*}}: {{Chipname|68k}} data bus for [[joypad]] outputs
*BNK0~BNK2: Memory card upper address lines to {{Chipname|NEO-E0}}
* {{Sig|BNK*|BNK*}}: [[Memory card]] upper address lines to {{Chipname|NEO-E0}}
*A4: 68k address line
* {{Sig|A4|A4}}: 68k address line for decoding
*4116CS: Z80 RAM /CS
* {{Sig|6116CS|6116CS}}: [[Z80 RAM]] select
*2610*: YM2610 control lines
* 2610*: YM2610 control outputs
*OUT1~OUT6: Joypad outputs
* {{Sig|OUT*|OUT*}}: Joypad outputs
*SDMRD/SDMRW: Z80 ROM/RAM control lines
* {{Sig|SDMRD|SDMRD}}: Z80 ROM/RAM read
*SDRD0/SDRD1: Z80 port reads to {{Chipname|NEO-ZMC}} in cartridge
* {{Sig|SDMRW|SDMRW}}: Z80 RAM write
*SDZ80*: Control lines to {{Chipname|NEO-C1}}
* {{Sig|SDRD*|SDRD*}}: Z80 port read to {{Chipname|NEO-ZMC}} in cartridge
* {{Sig|SDZ80CLR|SDZ80CLR}}: Clear command code in {{Chipname|NEO-C1}}
* {{Sig|SDZ80RD|SDZ80RD}}: Read command code from {{Chipname|NEO-C1}}
* {{Sig|SDZ80WR|SDZ80WR}}: Write reply code to {{Chipname|NEO-C1}}


[[Category:Chips]]
[[Category:Chips]]

Latest revision as of 14:43, 21 May 2020

Package QFP64R
Manufacturer
First use 1990 ?
Used on MV4 and many more...

Maybe similar to NEO-SUD on the NeoGeo CD. Close to the audio hardware.

Pinout


Edit this pinout


Internal schematic

Signals