Clock: Difference between revisions
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Not to be confused with the [[RTC|real time clock]] (RTC), which is clocked independently. | |||
[[File:Clkdistribution.png|frame]] | [[File:Clkdistribution.png|frame]] | ||
=In cartridge systems= | |||
The main system clock (often called '''mclk''') is either 24MHz (MVS) or 24.167829MHz (AES). It is generated and divided by 2, 4 and 8 by {{Chipname|NEO-D0}} from a crystal oscillator, to provide the 12MHz clock for {{Chipname|NEO-ZMC2}}, the inverted 6MHz one for [[video DAC|video output]] and also the 3MHz one for {{Chipname|NEO-B1}}. | |||
{{Chipname|LSPC2-A2}} divides it by 3 and 6 to provide the 8MHz clock for the {{Chipname|YM2610}} and the 4MHz one for the {{Chipname|Z80}}. | |||
The | The cartridge connector provides the 24MHz, 12MHz, 8MHz and 4MHz inverted clock signals. | ||
A second quartz oscillator is used in the AES for generating the color burst needed by composite video, for the [[video encoder]]s. | |||
The | The value changes depending on the region of the system, 4.43361875Mhz for PAL systems and 3.579545Mhz for NTSC systems. | ||
A | A third 32.768KHz quartz oscillator is present in the MVS used for the [[RTC|real time clock]]. | ||
[[File:clock.png]] | [[File:clock.png]] | ||
== In CD systems | ==Phase relations== | ||
To do: 8M is 33high/66low, not 50/50 | |||
[[File:Clockphases.png]] | |||
==Signals== | |||
{{Sig|24M|24M}} (~24MHz), {{Sig|12M|12M}} (12MHz), {{Sig|68KCLK|68KCLK}} (12MHz), {{Sig|68KCLKB|68KCLKB}} (12MHz), {{Sig|8M|8M}} (8MHz), {{Sig|6MB|6MB}} (6MHz), {{Sig|4M|4M}} (12MHz), {{Sig|4MB|4MB}} (4MHz), {{Sig|1MB|1MB}} ('''3MHz''') | |||
=In CD systems= | |||
[[File:Cd2_quartz.jpg|thumb|System clock and | [[File:Cd2_quartz.jpg|thumb|System clock and [[video PLL]] circuit on a CDM3-2 board.]] | ||
{{Chipname|NEO-GRC}} ? | |||
[[Category:Base system]] | [[Category:Base system]] | ||
Latest revision as of 22:38, 18 June 2020
Not to be confused with the real time clock (RTC), which is clocked independently.
In cartridge systems
The main system clock (often called mclk) is either 24MHz (MVS) or 24.167829MHz (AES). It is generated and divided by 2, 4 and 8 by NEO-D0 from a crystal oscillator, to provide the 12MHz clock for NEO-ZMC2, the inverted 6MHz one for video output and also the 3MHz one for NEO-B1.
LSPC2-A2 divides it by 3 and 6 to provide the 8MHz clock for the YM2610 and the 4MHz one for the Z80.
The cartridge connector provides the 24MHz, 12MHz, 8MHz and 4MHz inverted clock signals.
A second quartz oscillator is used in the AES for generating the color burst needed by composite video, for the video encoders.
The value changes depending on the region of the system, 4.43361875Mhz for PAL systems and 3.579545Mhz for NTSC systems.
A third 32.768KHz quartz oscillator is present in the MVS used for the real time clock.
Phase relations
To do: 8M is 33high/66low, not 50/50
Signals
24M (~24MHz), 12M (12MHz), 68KCLK (12MHz), 68KCLKB (12MHz), 8M (8MHz), 6MB (6MHz), 4M (12MHz), 4MB (4MHz), 1MB (3MHz)
In CD systems
NEO-GRC ?