Latest revision as of 06:11, 18 April 2025

Maybe similar to NEO-SUD on the NeoGeo CD. Close to the audio hardware.

Pinout

@@ Line 1: / Line 1: @@
-[[File:aes_d0.jpg|right|thumb|NEO-D0 chip found on an AES board.]]
+{{ChipInfo
+|picture=aes_d0.jpg
+|pkg=QFP64R
+|manu=fujitsu
+|date=1990 ?
+|gates=
+|used_on={{PCB|MV4}} and many more...
+}}
-Probably similar to [[NEO-SUD]] on the NeoGeo CD. Close to the audio hardware.
+* Clock divider
+* {{Chipname|Z80}} memory and [[Z80 port map|port]] control
+* {{Chipname|YM2610}} interface
+* [[Memory card]] bank selection
+* [[Joypad]] outputs
-[[Catégorie:Chips]]
+Maybe similar to {{Chipname|NEO-SUD}} on the NeoGeo CD. Close to the audio hardware.
+=Pinout=
+{{Pinout|NEO-D0|640}}
+=Internal schematic of Z80 section=
+[[File:Neo-d0_sd.png]]
+=NEC Board AES Version (NEO-D0 made with TTL Logic) =
+[[File:Neo-d0 Board NEC.png]]
+=Signals=
+* {{Sig|D*|D*}}: {{Chipname|68k}} data bus for [[joypad]] outputs
+* {{Sig|BNK*|BNK*}}: [[Memory card]] upper address lines to {{Chipname|NEO-E0}}
+* {{Sig|A4|A4}}: 68k address line for decoding
+* {{Sig|6116CS|6116CS}}: [[Z80 RAM]] select
+* 2610*: YM2610 control outputs
+* {{Sig|OUT*|OUT*}}: Joypad outputs
+* {{Sig|SDMRD|SDMRD}}: Z80 ROM/RAM read
+* {{Sig|SDMRW|SDMRW}}: Z80 RAM write
+* {{Sig|SDRD*|SDRD*}}: Z80 port read to {{Chipname|NEO-ZMC}} in cartridge
+* {{Sig|SDZ80CLR|SDZ80CLR}}: Clear command code in {{Chipname|NEO-C1}}
+* {{Sig|SDZ80RD|SDZ80RD}}: Read command code from {{Chipname|NEO-C1}}
+* {{Sig|SDZ80WR|SDZ80WR}}: Write reply code to {{Chipname|NEO-C1}}
+[[Category:Chips]]