NEO-D0: Difference between revisions
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=Internal | =Internal schematic of Z80 section= | ||
[[File:Neo-d0_sd.png]] | [[File:Neo-d0_sd.png]] | ||
=NEC Board AES Version (NEO-D0 made with TTL Logic) = | |||
[[File:Neo-d0 Board NEC.png]] | |||
=Signals= | =Signals= | ||
Latest revision as of 06:11, 18 April 2025
| |
| Package | QFP64R |
| Manufacturer | 
|
| First use | 1990 ? |
| Used on | MV4 and many more... |
- Clock divider
- Z80 memory and port control
- YM2610 interface
- Memory card bank selection
- Joypad outputs
Maybe similar to NEO-SUD on the NeoGeo CD. Close to the audio hardware.
Pinout
Internal schematic of Z80 section
NEC Board AES Version (NEO-D0 made with TTL Logic)
Signals
- D*: 68k data bus for joypad outputs
- BNK*: Memory card upper address lines to NEO-E0
- A4: 68k address line for decoding
- 6116CS: Z80 RAM select
- 2610*: YM2610 control outputs
- OUT*: Joypad outputs
- SDMRD: Z80 ROM/RAM read
- SDMRW: Z80 RAM write
- SDRD*: Z80 port read to NEO-ZMC in cartridge
- SDZ80CLR: Clear command code in NEO-C1
- SDZ80RD: Read command code from NEO-C1
- SDZ80WR: Write reply code to NEO-C1