Signals: Difference between revisions

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(Table-ized some more...)
Line 42: Line 42:
|4MHz clock (24/6) inverted
|4MHz clock (24/6) inverted
|Clock
|Clock
|?
|{{Chipname|LSPC}} + inverter
|?
|?
|-
|-
Line 61: Line 61:
|Clock
|Clock
|{{Chipname|NEO-D0}}
|{{Chipname|NEO-D0}}
|?
|Missing or bad instruments in music
|-
|}
|2H1
 
|[[S ROM]] A3
=CPU ([[68k]])=
|Address
{| class="regdef"
|{{Chipname|LSPC}}
|'''Name'''
|Bad fix graphics
|'''Description'''
|'''Type'''
|'''Comes from'''
|'''Fault consequence'''
|-
|-
|A1~A23
|A1~A23
Line 78: Line 81:
|Altered address lines for [[68k vector table]] swap
|Altered address lines for [[68k vector table]] swap
|Address
|Address
|?
|{{Chipname|NEO-E0}}
|Probably click of death
|Probably click of death
|-
|-
Line 87: Line 90:
|Probably click of death
|Probably click of death
|-
|-
|BNK0~2
|D0~D15
|[[Memory card]] bank selection
|68k data bus
|Data
|Multiple
|Click of death
|-
|/DTACK
|68k Data Transmit ACKnowledge (see [[wait cycles]])
|Control
|{{Chipname|NEO-C1}}
|Click of death ?
|-
|/PORTADRS
|$200000-$2FFFFF (P2 ROM/[[PRO-CT0|Security chip]]) any access
|Control
|{{Chipname|NEO-C1}}
|Game freezes, bad graphics
|-
|/PORTOEL
|$200000-$2FFFFF (P2 ROM/Security chip) odd byte read
|Control
|{{Chipname|NEO-C1}}
|Game freezes, bad graphics
|-
|/PORTOEU
|$200000-$2FFFFF (P2 ROM/Security chip) even byte read
|Control
|{{Chipname|NEO-C1}}
|Game freezes, bad graphics
|-
|/PORTWEL
|$200000-$2FFFFF (P2 ROM/Security chip) odd byte write
|Control
|{{Chipname|NEO-C1}}
|Game freezes, [[multiplayer]] comm. error
|-
|/PORTWEU
|$200000-$2FFFFF (P2 ROM/Security chip) even byte write
|Control
|{{Chipname|NEO-C1}}
|Game freezes, bad graphics
|-
|/PWAIT0, /PWAIT1
|Adds 0 to 3 cycle delay for [[P ROM|P2 ROM]] reads, see [[wait cycles]]
|Control
|{{Chipname|NEO-C1}}
|Game freezes (unlikely)
|-
|R/W
|68k Read/Write
|Control
|{{Chipname|68k}}
|Click of death
|-
|/ROMOE
|$000000-$0FFFFF ([[P ROM|P1 ROM]]) read
|Control
|{{Chipname|NEO-C1}} + AND
|Game doesn't start
|-
|/ROMOEL
|$000000-$0FFFFF (P1 ROM) odd byte read
|Control
|{{Chipname|NEO-C1}}
|Game doesn't start
|-
|/ROMOEU
|$000000-$0FFFFF (P1 ROM) even byte read
|Control
|{{Chipname|NEO-C1}}
|Game doesn't start
|-
|/ROMWAIT
|Add 1-cycle delay for P1 ROM reads
|Control
|{{Chipname|NEO-C1}}
|Game freezes (unlikely)
|-
|/SROMOE
|$C00000-$CFFFFF ([[System ROM]]) read
|Control
|{{Chipname|NEO-E0}}
|Click of death
|-
|/SROMOEL
|$C00000-$CFFFFF (System ROM) odd byte read
|Control
|{{Chipname|NEO-C1}}
|Click of death
|-
|/SROMOEU
|$C00000-$CFFFFF (System ROM) even byte read
|Control
|Control
|?
|{{Chipname|NEO-C1}}
|Errors on access to big memory cards
|Click of death
|-
|}
 
=Graphics=
{| class="regdef"
|'''Name'''
|'''Description'''
|'''Type'''
|'''Comes from'''
|'''Fault consequence'''
|-
|2H1
|[[S ROM]] A3
|Address
|{{Chipname|LSPC}}
|Bad fix graphics
|-
|-
|CA4
|CA4
Line 104: Line 213:
|{{Chipname|C ROM}}
|{{Chipname|C ROM}}
|Bad sprite graphics
|Bad sprite graphics
|-
|D0~D15
|68k data bus
|Data
|Multiple
|Click of death
|-
|/DTACK
|68k Data Transmit ACKnowledge (see [[wait cycles]])
|Control
|{{Chipname|68k}}
|Click of death ?
|-
|-
|FIXD0~FIXD7
|FIXD0~FIXD7
Line 121: Line 218:
|Data
|Data
|{{Chipname|S ROM}}
|{{Chipname|S ROM}}
|Garbled graphics, solid color screen
|[[Graphic glitches|Static vertical lines]], solid color screen
|-
|-
|P0~P23
|P0~P23
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|Bad colors, snow, black screen
|Bad colors, snow, black screen
|}
|}
=Misc.=
{| class="regdef"
|'''Name'''
|'''Description'''
|'''Type'''
|'''Comes from'''
|'''Fault consequence'''
|-
|BNK0~2
|[[Memory card]] bank selection
|Control
|{{Chipname|NEO-D0}}
|Errors on access to big memory cards
|}
=CPU ([[Z80]])=
=Sound=


*PAL: Palette RAM address decode for 68k access
*PAL: Palette RAM address decode for 68k access
*PCK1B: Low 55ns, high 610 (1.5MHz) Clock to latch C ROM address from P0~P23 ([[NEO-273|mapping]]) on rising edge.
*PCK1B: Low 55ns, high 610 (1.5MHz) Clock to latch C ROM address from P0~P23 ([[NEO-273|mapping]]) on rising edge.
*PCK2B: Low 55ns, high 610 (1.5MHz) Clock to latch S ROM address from P0~P15 ([[NEO-273|mapping]]) on rising edge.
*PCK2B: Low 55ns, high 610 (1.5MHz) Clock to latch S ROM address from P0~P15 ([[NEO-273|mapping]]) on rising edge.
*/PORTADRS: $200000-$2FFFFF (P2+ ROM/Security chip) any access
*/PORTOEL: $200000-$2FFFFF (P2+ ROM/[[PRO-CT0|Security chip]]) odd byte read
*/PORTOEU: $200000-$2FFFFF (P2+ ROM/Security chip) even byte read
*/PORTWEL: $200000-$2FFFFF (P2+ ROM/Security chip) odd byte write
*/PORTWEU: $200000-$2FFFFF (P2+ ROM/Security chip) even byte write
*/PWAIT0, /PWAIT1: adds 0 to 3 cycle delay for [[P ROM|P2 ROM]] reads, see [[wait cycles]]
*R/W: 68k Read/Write
*/ROMOE: $000000-$0FFFFF ([[P ROM|P1 ROM]]) read
*/ROMOEL: $000000-$0FFFFF (P1 ROM) odd byte read
*/ROMOEU: $000000-$0FFFFF (P1 ROM) even byte read
*/ROMWAIT: add 1-cycle delay for [[P ROM|P1 ROM]] reads
*/SROMOE: $C00000-$CFFFFF ([[System ROM]]) read
*/SROMOEL: $C00000-$CFFFFF (System ROM) odd byte read
*/SROMOEU: $C00000-$CFFFFF (System ROM) even byte read
*SDA0~SDA15 : [[Z80]] address bus
*SDA0~SDA15 : [[Z80]] address bus
*SDD0~SDD7: Z80 data bus
*SDD0~SDD7: Z80 data bus

Revision as of 12:39, 3 October 2016

Most names come from the official schematics.

Clocks

Name Description Type Comes from Fault consequence
24M 24MHz master clock Clock NEO-D0 Nothing works, no video at all
12M 12MHz clock (24/2) non-inverted Clock NEO-D0 Bad graphics
8M 8MHz clock (24/3) non-inverted Clock LSPC No sound
6MB 6MHz clock (24/4) inverted Clock NEO-D0 Black screen ?
4M 4MHz clock (24/6) non-inverted Clock LSPC No sound
4MB 4MHz clock (24/6) inverted Clock LSPC + inverter ?
1MB 3MHz (!) clock (24/8) inverted Clock NEO-D0 ?
68KCLK 12MHz clock (24/2) non-inverted Clock NEO-D0 Click of death
68KCLKB 12MHz clock (24/2) inverted Clock NEO-D0 Missing or bad instruments in music

CPU (68k)

Name Description Type Comes from Fault consequence
A1~A23 68k address bus Address 68k Click of death
A22I,A23I Altered address lines for 68k vector table swap Address NEO-E0 Probably click of death
AS 68k Address Strobe Control 68k Probably click of death
D0~D15 68k data bus Data Multiple Click of death
/DTACK 68k Data Transmit ACKnowledge (see wait cycles) Control NEO-C1 Click of death ?
/PORTADRS $200000-$2FFFFF (P2 ROM/Security chip) any access Control NEO-C1 Game freezes, bad graphics
/PORTOEL $200000-$2FFFFF (P2 ROM/Security chip) odd byte read Control NEO-C1 Game freezes, bad graphics
/PORTOEU $200000-$2FFFFF (P2 ROM/Security chip) even byte read Control NEO-C1 Game freezes, bad graphics
/PORTWEL $200000-$2FFFFF (P2 ROM/Security chip) odd byte write Control NEO-C1 Game freezes, multiplayer comm. error
/PORTWEU $200000-$2FFFFF (P2 ROM/Security chip) even byte write Control NEO-C1 Game freezes, bad graphics
/PWAIT0, /PWAIT1 Adds 0 to 3 cycle delay for P2 ROM reads, see wait cycles Control NEO-C1 Game freezes (unlikely)
R/W 68k Read/Write Control 68k Click of death
/ROMOE $000000-$0FFFFF (P1 ROM) read Control NEO-C1 + AND Game doesn't start
/ROMOEL $000000-$0FFFFF (P1 ROM) odd byte read Control NEO-C1 Game doesn't start
/ROMOEU $000000-$0FFFFF (P1 ROM) even byte read Control NEO-C1 Game doesn't start
/ROMWAIT Add 1-cycle delay for P1 ROM reads Control NEO-C1 Game freezes (unlikely)
/SROMOE $C00000-$CFFFFF (System ROM) read Control NEO-E0 Click of death
/SROMOEL $C00000-$CFFFFF (System ROM) odd byte read Control NEO-C1 Click of death
/SROMOEU $C00000-$CFFFFF (System ROM) even byte read Control NEO-C1 Click of death

Graphics

Name Description Type Comes from Fault consequence
2H1 S ROM A3 Address LSPC Bad fix graphics
CA4 C ROMs A4 Address LSPC Bad sprite graphics
C* or CR0~CR31 C ROMs data bus (2*16bits), data for one 8-pixels line Data C ROM Bad sprite graphics
FIXD0~FIXD7 Fix layer data bus, data for 2 pixels Data S ROM Static vertical lines, solid color screen
P0~P23 Multiplexed P bus Muxed Multiple Garbled or absent graphics
PA0~PA11 Palette RAM address bus Address NEO-B1 Bad colors, snow, black screen

Misc.

Name Description Type Comes from Fault consequence
BNK0~2 Memory card bank selection Control NEO-D0 Errors on access to big memory cards

CPU (Z80)

Sound

  • PAL: Palette RAM address decode for 68k access
  • PCK1B: Low 55ns, high 610 (1.5MHz) Clock to latch C ROM address from P0~P23 (mapping) on rising edge.
  • PCK2B: Low 55ns, high 610 (1.5MHz) Clock to latch S ROM address from P0~P15 (mapping) on rising edge.
  • SDA0~SDA15 : Z80 address bus
  • SDD0~SDD7: Z80 data bus
  • SDRAD0~SDRAD7: ADPCM-A ROM multiplexed bus (data/address)
  • SDRA8,SDRA9,SDRA20~SDRA23: ADPCM-A ROM address bus
  • SDPAD0~SDPAD7: ADPCM-B ROM multiplexed bus (data/address)
  • SDPA8,SDPA9,SDPA10,SDPA11: ADPCM-B ROM address bus
  • SYSTEM: low when onboard ROMs selected
  • SYSTEMB: inverted SYSTEM
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