NEO-D0: Difference between revisions

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[[File:aes_d0.jpg|right|thumb|NEO-D0 chip found on an AES board.]]
[[File:aes_d0.jpg|right|thumb|NEO-D0 chip found on an AES board.]]


*Clock generation
*Clock divider
*[[YM2610]] control
*{{Chipname|Z80}} memory and [[Z80 port map|port]] control
*Z80 port control (I/O to 68k and YM2610)
*{{Chipname|YM2610}} interface
*[[Memory card]] banking
*[[Memory card]] bank selection
*Joypad outputs
*[[Joypad]] outputs


Probably similar to [[NEO-SUD]] on the NeoGeo CD. Close to the audio hardware.
Maybe similar to {{Chipname|NEO-SUD}} on the NeoGeo CD. Close to the audio hardware.


=Pinout=
=Pinout=
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OpenOffice Draw file: [[File:neo-d0.odg]]
OpenOffice Draw file: [[File:neo-d0.odg]]
TODO: RESETP is an input.


=Signals=
=Signals=


*D0~D5: [[68k]] data bus
*D0~D5: {{Chipname|68k}} data bus for joypad outputs
*BNK0~BNK2: To [[NEO-E0]] (on multislot boards ?)
*BNK0~BNK2: Memory card upper address lines to {{Chipname|NEO-E0}}
*A4: 68k address line
*A4: 68k address line
*4116CS: [[Z80]] RAM /CS
*4116CS: Z80 RAM /CS
*2610*: [[YM2610]] control lines
*2610*: YM2610 control lines
*OUT1~OUT6: [[Joypad]] outputs
*OUT1~OUT6: Joypad outputs
*SDMRD/SDMRW: Z80 [[SM1]]/RAM control lines
*SDMRD/SDMRW: Z80 ROM/RAM control lines
*SDZ80*: From [[NEO-C1]]
*SDRD0/SDRD1: Z80 port reads to {{Chipname|NEO-ZMC}} in cartridge
*SDZ80*: Control lines to {{Chipname|NEO-C1}}


[[Category:Chips]]
[[Category:Chips]]

Revision as of 22:25, 11 October 2016

NEO-D0 chip found on an AES board.

Maybe similar to NEO-SUD on the NeoGeo CD. Close to the audio hardware.

Pinout

File:Neo-d0 pinout.png

OpenOffice Draw file: File:Neo-d0.odg

Signals

  • D0~D5: 68k data bus for joypad outputs
  • BNK0~BNK2: Memory card upper address lines to NEO-E0
  • A4: 68k address line
  • 4116CS: Z80 RAM /CS
  • 2610*: YM2610 control lines
  • OUT1~OUT6: Joypad outputs
  • SDMRD/SDMRW: Z80 ROM/RAM control lines
  • SDRD0/SDRD1: Z80 port reads to NEO-ZMC in cartridge
  • SDZ80*: Control lines to NEO-C1