NEO-F0: Difference between revisions
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MVS specific chip. | MVS specific chip. | ||
Handles the [[UPD4990]] calendar access, dipswitches, cab switches (test, service...), coin counters, LED marquee outputs and slot selection signals for multi-slot boards. | Handles the [[UPD4990]] calendar access, dipswitches, cab switches (test, service...), coin counters, LED and marquee outputs and slot selection signals for multi-slot boards. | ||
SYSTEMB is used as an input to gate the SLOT* pins. | SYSTEMB is used as an input to gate the SLOT* pins. | ||
To do: D0~7 are bidir. | To do: D0~7 are bidir. SLOTA~C are outputs. | ||
=Pinout= | =Pinout= | ||
| Line 17: | Line 17: | ||
*D0~D7: 68k data bus | *D0~D7: 68k data bus | ||
*4990*: [[uPD4990]] RTC interface | *4990*: [[uPD4990]] RTC interface | ||
*DATA0~DATA7: LED marquee latch data output | *DATA0~DATA7: [[MV-LED|Credits displays]] and [[cab marquee]] latch data output | ||
*DIP00~DIP07: [[DIPs|Dipswitch]] inputs | *DIP00~DIP07: [[DIPs|Dipswitch]] inputs | ||
*IN3: Output IN300~IN304 to D0~D4 and CALTP/CALDOUT to D6/D7 (read $320001) | *IN3 (DIPRD1): Output IN300~IN304 to D0~D4 and CALTP/CALDOUT to D6/D7 (read $320001) | ||
* | *DIPRD0: Output to D0~D7 depending on state of A7: | ||
** A7 low: output dipswitch states DIP00~DIP07 (read $300001) | ** A7 low: output dipswitch states DIP00~DIP07 (read $300001) | ||
** A7 high: output IN01 to D7 (test switch) and TYPE to D6 (read $300081) | ** A7 high: output IN01 to D7 (test switch) and TYPE to D6 (read $300081) | ||
*SLOTA~SLOTC: binary slot selection | *SLOTA~SLOTC: binary slot selection | ||
*SLOT0~SLOT5: decoded slot selection | *SLOT0~SLOT5: decoded slot selection | ||
| Line 36: | Line 35: | ||
MV2B: | MV2B: | ||
*IN303: NEO-E0 H6 50 (BNK0) | |||
*IN304: 3 of PRO-C0, NEO-E0 H6 48 | *IN304: 3 of PRO-C0, NEO-E0 H6 48 | ||
[[Category:Chips]] | [[Category:Chips]] | ||
Revision as of 02:53, 3 March 2016
MVS specific chip.
Handles the UPD4990 calendar access, dipswitches, cab switches (test, service...), coin counters, LED and marquee outputs and slot selection signals for multi-slot boards.
SYSTEMB is used as an input to gate the SLOT* pins.
To do: D0~7 are bidir. SLOTA~C are outputs.
Pinout
OpenOffice Draw file: File:Neo-f0.odg
- A4~A7: 68k address bus
- D0~D7: 68k data bus
- 4990*: uPD4990 RTC interface
- DATA0~DATA7: Credits displays and cab marquee latch data output
- DIP00~DIP07: Dipswitch inputs
- IN3 (DIPRD1): Output IN300~IN304 to D0~D4 and CALTP/CALDOUT to D6/D7 (read $320001)
- DIPRD0: Output to D0~D7 depending on state of A7:
- A7 low: output dipswitch states DIP00~DIP07 (read $300001)
- A7 high: output IN01 to D7 (test switch) and TYPE to D6 (read $300081)
- SLOTA~SLOTC: binary slot selection
- SLOT0~SLOT5: decoded slot selection
MV1F:
- IN00: Ground
- IN01: Test switch
- IN300: P1 Coin switch
- IN301: P2 Coin switch
- IN302: Service switch
- IN303/IN304: VCC
MV2B:
- IN303: NEO-E0 H6 50 (BNK0)
- IN304: 3 of PRO-C0, NEO-E0 H6 48