NEO-F0

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Mvs f0.jpg
Package QFP64R
Manufacturer Logo fujitsu.jpg
First use 1991 ?
Used on MV1FZS MV1-1 ...

MVS specific chip.

Note: SYSTEMB is used to gate the SLOT* outputs.

Pinout

NEO-F0 pinout.png
Edit this pinout

Signals

CPU

  • A4~A7: 68k address bus
  • D0~D7: 68k data bus

RTC

4990*: uPD4990 RTC interface

IN3 DIPRD1: Output IN300~IN304 to D0~D4 and CALTP/CALDOUT to D6/D7 (read $320001). D5 is IN00 ?

I/O

DIPRD0: Output to D0~D7 depending on state of A7:

  • A7 low: output dipswitch states DIP00~DIP07 (read $300001)
  • A7 high: output IN01 to D7 (test switch) and TYPE to D6 (read $300081)

Slot select

  • SLOTA~SLOTC: binary slot selection
  • SLOT0~SLOT5: decoded slot selection (active low)

Connections

MV1F:

  • IN00: Ground
  • IN01: Test switch
  • IN300: P1 Coin switch
  • IN301: P2 Coin switch
  • IN302: Service switch
  • IN303/IN304: VCC

MV2B:

  • IN303: NEO-E0 H6 50 (BNK0)
  • IN304: 3 of PRO-C0, NEO-E0 H6 48