Latest revision as of 02:07, 8 July 2018

Chip found on late MVS boards.

Pinout

@@ Line 1: / Line 1: @@
-[[File:neo-sdr-t.jpg|thumb]]
+{{ChipInfo
+|picture=neo-sdr-t.jpg
+|pkg=QFP100R
+|manu=toshiba
+|date=1994 ?
+|gates=
+|used_on={{PCB|MV1B}} {{PCB|MV1C}} {{PCB|Neo Print}}...
+}}
-Chip found on MV1B and MV1C [[MVS hardware|slots]]. Handles [[Z80]] subsystem address and port decoding, Z80/68K communication latches and interrupt generation, similarly to [[NEO-D0]]. Handles controller I/Os as well.
+Chip found on late [[MVS hardware|MVS]] boards.
-Draft pinout: [[File:neo-sdr.odg]]
+* [[Joypad]] I/O
+* {{Chipname|Z80}} address and port decoding
+* [[68k/Z80 communication]] latches and interrupt generation, similarly to {{Chipname|NEO-D0}}
+* [[68k]] interrupts latch ?
-== Pinout ==
+=Pinout=
-[[File:Neo-sdr_pinout.png]]
+{{Pinout|NEO-SDR|900px}}
 [[Category:Chips]]